參數(shù)資料
型號(hào): DSP56F807VF80E
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號(hào)控制器
文件頁(yè)數(shù): 57/60頁(yè)
文件大小: 522K
代理商: DSP56F807VF80E
Electrical Design Considerations
56F807 Technical Data Technical Data, Rev. 15
Freescale Semiconductor
57
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
DD
and V
SS
pins
are less than 0.5 inch per capacitor lead.
Bypass the V
DD
and V
SS
layers of the PCB with approximately 100
μ
F, preferably with a high-grade
capacitor such as a tantalum capacitor.
Because the controller’s output signals have fast rise and fall times, PCB trace lengths should be minimal.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the V
DD
and V
SS
circuits.
Take special care to minimize noise levels on the VREF, V
DDA
and V
SSA
pins.
Designs that utilize the TRST pin for JTAG port or OnCE module functionality (such as development or
debugging systems) should allow a means to assert TRST whenever RESET is asserted, as well as a means
to assert TRST independently of RESET. TRST must be asserted at power up for proper operation. Designs
that do not require debugging functionality, such as consumer products, TRST should be tied low.
Because the Flash memory is programmed through the JTAG/OnCE port, designers should provide an
interface to this port to allow in-circuit Flash programming.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F807VF80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC
DSP56F807VF80J 制造商:Freescale Semiconductor 功能描述:DSP 16BIT - Trays
DSP56F826 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56F826-827UM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor Users Manual
DSP56F826-827UM/D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller