參數(shù)資料
型號: DSP56F826BU80
廠商: Freescale Semiconductor
文件頁數(shù): 38/56頁
文件大?。?/td> 0K
描述: IC DSP 80MHZ 64KB FLASH 100LQFP
標(biāo)準(zhǔn)包裝: 90
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 80MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 46
程序存儲器容量: 67KB(33.5K x 16)
程序存儲器類型: 閃存
RAM 容量: 4.5K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 2.75 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
Synchronous Serial Interface (SSI) Timing
56F826 Technical Data, Rev. 14
Freescale Semiconductor
43
Synchronous Operation (in addition to standard external clock parameters)
SRXD Setup time before STCK low - Slave
tTSS
4—
SRXD Hold time after STCK low - Slave
tTHS
4—
1. Slave mode is externally generated clocks and frame syncs
2. Max clock frequency is IP_clk/4 = 40MHz / 4 = 10MHz for an 80MHz part.
3. All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP=0 in SCR2 and RSCKP=0 in SCSR)
and a non-inverted frame sync (TFSI=0 in SCR2 and RFSI=0 in SCSR). If the polarity of the clock and/or the frame sync
have been inverted, all the timings remain valid by inverting the clock signal STCK/SRCK and/or the frame sync STFS/SRFS
in the tables and in the figures.
4. 50% duty cycle
5. bl = bit length; wl = word length
Table 3-14 SSI Slave Mode1 Switching Characteristics
Operating Conditions: VSSIO = VSS = VSSA = 0V, VDDA = VDDIO = 3.0–3.6V, VDD = 2.25–2.75V, TA = –40° to +85°C, CL ≤ 50pF, fop = 80MHz
Parameter
Symbol
Min
Typ
Max
Units
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