參數(shù)資料
型號: DSP56F826BU80
廠商: Freescale Semiconductor
文件頁數(shù): 6/56頁
文件大?。?/td> 0K
描述: IC DSP 80MHZ 64KB FLASH 100LQFP
標準包裝: 90
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 80MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設備: POR,WDT
輸入/輸出數(shù): 46
程序存儲器容量: 67KB(33.5K x 16)
程序存儲器類型: 閃存
RAM 容量: 4.5K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 2.75 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
56F826 Technical Data, Rev. 14
14
Freescale Semiconductor
GPIOB0
66
Input or
Output
Port B GPIO—These eight dedicated General Purpose I/O (GPIO) pins can be
individually programmed as input or output pins.
After reset, the default state is GPIO input.
GPIOB1
67
GPIOB2
68
GPIOB3
69
GPIOB4
70
GPIOB5
71
GPIOB6
72
GPIOB7
73
GPIOD0
74
Input or
Output
Port D GPIO—These eight dedicated GPIO pins can be individually
programmed as an input or output pins.
After reset, the default state is GPIO input.
GPIOD1
75
GPIOD2
76
GPIOD3
77
GPIOD4
78
GPIOD5
79
GPIOD6
82
GPIOD7
83
SRD
(GPIOC0)
51
Input/Output
SSI Receive Data (SRD)—This input pin receives serial data and transfers the
data to the SSI Receive Shift Receiver.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRFS
(GPIOC1)
52
Input/ Output
Input/Output
SSI Serial Receive Frame Sync (SRFS)—This bidirectional pin is used by the
receive section of the SSI as frame sync I/O or flag I/O. The STFS can be used
only by the receiver. It is used to synchronize data transfer and can be an input
or an output.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP (Continued)
Signal
Name
Pin No.
Type
Description
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