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參數(shù)資料
| 型號： | DSP56F827FG80 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 26/60頁 |
| 文件大?。?/td> | 811K |
| 代理商： | DSP56F827FG80 |
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56F827 Technical Data, Rev. 12
26
Freescale Semiconductor
V
DD
should not be allowed to rise early (1). This is usually avoided by running the regulator for the V
DD
supply (2.5V) from the voltage generated by the 3.3V V
DDIO
supply, see
Figure 3-3
. This keeps V
DD
from
rising faster than V
DDIO
.
V
DD
should not rise so late that a large voltage difference is allowed between the two supplies (2).
Typically, this situation is avoided by using external discrete diodes in series between supplies, as shown
in
Figure 3-3
. The series diodes forward bias when the difference between V
DDIO
and V
DD
reaches
approximately 1.4, causing V
DD
to rise as V
DDIO
ramps up. When the V
DD
regulator begins proper
operation, the difference between supplies will typically be 0.8V and conduction through the diode chain
reduces to essentially leakage current. During supply sequencing, the following general relationship
should be adhered to:
V
DDIO
> V
DD
> (V
DDIO
- 1.4V)
In practice, V
DDA
is typically connected directly to V
DDIO
with some filtering.
Figure 3-3 Example Circuit to Control Supply Sequencing
3.4 AC Electrical Characteristics
Timing waveforms in
Section 3.4
are tested using the V
IL
and V
IH
levels specified in the DC Characteristics
table. In
Figure 3-4
the levels of V
IH
and V
IL
for an input signal are shown.
Figure 3-4 Input Signal Measurement References
Figure 3-5
shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached V
OL
or V
OH
Data Invalid state, when a signal level is in transition between V
OL
and V
OH
3.3V
Regulator
2.5V
Regulator
Supply
V
DD
V
DDIO,
V
DDA
V
IH
V
IL
Fall Time
Input Signal
Note: The midpoint is V
IL
+ (V
IH
– V
IL
)/2.
Midpoint1
Low
High
Pulse Width
90%
50%
10%
Rise Time
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56F827FG80E | 16-bit Digital Signal Controllers |
| DSP56F827 | 16-bit Hybrid Controller(16位混合控制器) |
| DSP8-08AC | Phase-leg Rectifier Diode ISOPLUS220 |
| DSP8-08 | Phase-leg Rectifier Diode |
| DSP8-08AS | Phase-leg Rectifier Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827FG80E | 功能描述:16位微控制器 - MCU 80Mhz/40MIPS RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP128 3.6V |
| DSP56F827PB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 16-Bit Hybrid Controller Product Brief |
| DSP56F827PB/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
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