參數(shù)資料
型號: DSP56F827FG80
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 42/60頁
文件大?。?/td> 811K
代理商: DSP56F827FG80
56F827 Technical Data, Rev. 12
42
Freescale Semiconductor
3.10 Analog-to-Digital Converter (ADC) Timing
Table 3-13 ADC Characteristics
Characteristic
Symbol
Min
Typ
Max
Unit
ADC Input voltage
V
ADCIN
0
V
REFHI1
1.
V
DDA
-0.3V.
V
REF
must be equal to or less than V
DDA
and must be greater than 2.7V. For optimal ADC performance, set V
REF
to
V
Resolution
R
ES
12
12
Bits
Integral Non-Linearity
2
INL
+/- 1
+/- 3
LSB
3
Differential Non-Linearity
DNL
+/- 0.4
+/- 1
LSB
3
Monotonicity
GUARANTEED
ADC internal clock
4
f
ADIC
0.5
2.5
MHz
Conversion range
R
AD
V
REFLO
V
REFHI
V
Power-up time
t
ADPU
25
ms
Conversion time
t
ADC
6
t
AIC
cycles
5
Sample time
t
ADS
1
t
AIC
cycles
5
Input capacitance
C
ADI
5
pF
5
Gain Error (transfer gain)
4
E
GAIN
0.95
1.00
1.10
Offset Voltage
4
V
OFFSET
-60
+15
+40
mV
Total Harmonic Distortion
4
THD
57
66
dB
Effective Number of Bits
4
ENOB
9.3
10.5
bit
Spurious Free Dynamic Range
4
SFDR
58
70
dB
Signal-to-Noise plus Distortion
4
SINAD
56
64
dB
ADC quiescent current
I
ADC
10
mA
ADC quiescent current (power
down bit set high)
I
ADCPD
1
μ
A
V
REF
quiescent current
I
VREF
1
mA
V
REF
quiescent current (power
down bit set high)
I
VREFPD
1
μ
A
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