Symphony DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2 Freescale Semico" />
參數(shù)資料
型號: DSPB56725AF
廠商: Freescale Semiconductor
文件頁數(shù): 7/48頁
文件大?。?/td> 0K
描述: DSP 24BIT AUD 250MHZ 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機接口,I²C,SAI,SPI
時鐘速率: 250MHz
非易失內(nèi)存: 外部
芯片上RAM: 112kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
Symphony DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2
Freescale Semiconductor
15
1.2.1
Serial Host Interface SPI Protocol Timing
Table 9 lists the serial host interface SPI protocol timing.
Table 9. Serial Host Interface SPI Protocol Timing
No.
Characteristics1,3,4
Mode
Filter Mode
Expression
Min
Max
Unit
23
Minimum serial clock cycle = tSPICC(min)
Master/Slave
Bypassed
10
× TC + 9
59.0
ns
Very Narrow
10
× TC + 9
59.0
ns
Narrow
10
× TC + 133
183.0
ns
Wide
10
× TC + 333
383.0
ns
XX
Tolerable Spike width on data or clock in.
Bypassed
0
ns
Very Narrow
10
ns
Narrow
50
ns
Wide
100
ns
24
Serial clock high period
Master
Bypassed
0.5
× (tSPICC)
29.5
ns
Very Narrow
0.5
× (tSPICC)
29.5
ns
Narrow
0.5
× (tSPICC)
91.5
ns
Wide
0.5
× (tSPICC)
191.5
ns
Slave
Bypassed
2.0
× TC + 19.6
29.6
ns
Very Narrow
2.0
× TC + 19.6
29.6
ns
Narrow
2.0
× TC + 86.6
96.6
ns
Wide
2.0
× TC + 186.6
196.6
ns
25
Serial clock low period
Master
Bypassed
0.5
× (tSPICC)
29.5
ns
Very Narrow
0.5
× (tSPICC)
29.5
ns
Narrow
0.5
× (tSPICC)
91.5
ns
Wide
0.5
× tSPICC)
191.5
ns
Slave
Bypassed
2.0
× TC + 19.6
29.6
ns
Very Narrow
2.0
× TC + 19.6
29.6
ns
Narrow
2.0
× TC + 86.6
96.6
ns
Wide
2.0
× TC + 186.6
196.6
ns
26
Serial clock rise/fall time
Master
Slave
5
ns
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