參數(shù)資料
型號： DZPD6710VCB
廠商： INTEL CORP
元件分類： 總線控制器
英文描述： ISA-to-PC-Card (PCMCIA) Controllers
中文描述： PCMCIA BUS CONTROLLER, PQFP144
封裝： LQFP-144
文件頁數(shù)： 34/138頁
文件大?。?/td> 723K
代理商： DZPD6710VCB
PD6710/
’
22
—
ISA-to-PC-Card (PCMCIA) Controllers
34
Datasheet
4.1.9
Socket Power Management Features
Card Removal
When a card is removed from a socket, the PD67XX by default automatically disables the V
CC
and
V
PP
supplies to the socket. If
Extension Control 1
register bit 1 is
‘
0
’
, card power is prevented
from being automatically disabled when a card is removed. The PD67XX can also be configured to
have management interrupts notify software of card removal.
Card Insertion
Power to the socket is off at reset and whenever there is no card in a socket. When a card is
detected (card detect input pins, -CD1 and -CD2, to the PD67XX become asserted low), two
independent actions can be programmed to occur.
If the PD67XX has been set for automatic power-on (
Power Control
register bits 4 and 5 are both
‘
1
’
), the PD67XX automatically enables the socket V
CC
supply (and, if so programmed, the V
PP
supply).
If the PD67XX has been programmed to cause management interrupts for card-detection events,
assertion of -CD1 and -CD2 to the PD67XX causes a management interrupt to inform system
software that a card was inserted. In the case of manual power detection (
Power Control
register
Table 8. PD67XX Power-Management Modes
Mode Name
PWRGOOD
Level
AEN
Misc Control 2 Register
Functionality
Typical Power
Consumption
(CORE_VDD =
3.3 V,
ISA_VCC,
SOCKET_VCC, and
+5V = 5.0 V)
Suspend
Mode
(Bit 2)
Low-Power
Dynamic
Mode
(Bit 1)
Low-Power
Dynamic
(Default)
High
Normal
0
1
Full functionality
< 45 mW high activity,
9
–
14 mW normal
system activity
Normal
High
Normal
0
0
Full functionality
< 85 mW high activity,
18 mW normal
system activity
Suspend
(Software
Controlled)
High
Normal
1
–
8-bit access to
Misc
Control 2
register.
No other register
access. No card in
socket(s).
< 2 mW
Super-Suspend
(Hardware
Controlled)
High
Static
High
1
–
No register access.
No card in socket(s).
System bus signals
disabled (clock off).
< 1 mW
Reset
Low
1
–
–
–
No register access.
No card in socket(s).
System bus signals
disabled.
9
–
14 mW
1. IOR*, IOW*, MEMR*, and MEMW* must be held high when PWRGOOD is low to prevent manufacturing test mode outputs
from driving the system data bus
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