參數(shù)資料
型號: EDD5116AFTA-7B-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M bits DDR SDRAM
中文描述: 32M X 16 DDR DRAM, 0.75 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁數(shù): 36/49頁
文件大小: 567K
代理商: EDD5116AFTA-7B-E
EDD5108AFTA, EDD5116AFTA
Data Sheet E0699E20 (Ver. 2.0)
36
READ to PRECHARGE Command Interval (same bank): To stop output data
A burst data output can be interrupted with a precharge command. All DQ pins and DQS pins become High-Z tHZP
(= CL) after the precharge command.
out0 out1
CK
/CK
DQ
DQS
Command
t1
t0
t2
t3
t4
t5
t6
t7
t8
tHZP
READ
NOP
NOP
High-Z
High-Z
PRE/PALL
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 2, BL = 2, 4, 8)
out0 out1
CK
/CK
DQ
DQS
Command
t1
t0
t2
t3
t4
t5
t6
t7
t8
High-Z
High-Z
tHZP
CL = 2.5
READ
NOP
NOP
PRE/PALL
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 2.5, BL = 2, 4, 8)
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