參數(shù)資料
型號： EDD51321CBH-7ETT-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 512M bits DDR SDRAM
中文描述： 16M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA90
封裝： ROHS COMPLIANT, FBGA-90
文件頁數(shù)： 12/55頁
文件大?。?/td> 589K
代理商： EDD51321CBH-7ETT-E
EDD51321CBH
Preliminary Data Sheet E1094E30 (Ver. 3.0)
12
CKE (input pin)
CKE controls power-down mode, self-refresh function with other command inputs.
The CKE level must be kept for 2 clocks at least, that is, if CKE changes at the cross point of the CK rising edge and
the /CK falling edge with proper setup time tIS, by the next CK rising edge CKE level must be kept with proper hold
time tIH.
DQ0 to DQ31 (input/output pins)
Data are input to and output from these pins.
DQS0 to DQS3 (input and output pin):
DQS provides the read data strobes (as output) and the write data strobes
(as input). Each DQS pin corresponds to eight DQ pins, respectively (See DQS and DM Correspondence Table).
DM0 to DM3 (input pin)
DM is the reference signals of the data input mask function. DM is sampled at the cross point of DQS and VDDQ/2.
When DM = high, the data input at the same timing are masked while the internal burst counter will be counting up.
Each DM pin corresponds to eight DQ pins, respectively (See DQS and DM Correspondence Table).
[DQS and DM Correspondence Table]
Part number
Organization
DQS
Data mask
DQs
EDD51321CBH
×
32 bits
DQS0
DM0
DQ0 to DQ7
DQS1
DM1
DQ8 to DQ15
DQS2
DM2
DQ16 to DQ23
DQS3
DM3
DQ24 to DQ31
VDD, VSS, VDDQ, VSSQ (Power supply)
VDD and VSS are power supply pins for internal circuits. VDDQ and VSSQ are power supply pins for the output
buffers. VDD must be equal to VDDQ.
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