參數資料
型號: EDE1116ABSE-4A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 1G bits DDR2 SDRAM
中文描述: 64M X 16 DDR DRAM, 0.6 ns, PBGA92
封裝: ROHS COMPLIANT, FBGA-92
文件頁數: 48/82頁
文件大小: 618K
代理商: EDE1116ABSE-4A-E
EDE1104ABSE, EDE1108ABSE, EDE1116ABSE
Data Sheet E0852E50 (Ver. 5.0)
48
ODT (On Die Termination)
On Die Termination (ODT), is a feature that allows a DRAM to turn on/off termination resistance for each DQ, DQS,
/DQS, RDQS, /RDQS, and DM signal via the ODT control pin. The ODT feature is designed to improve signal
integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination resistance
for any or all DRAM devices.
The ODT function is turned off and not supported in self-refresh mode.
Switch sw1, sw2 or sw3 is enabled by ODT pin.
Selection between sw1, sw2 or sw3 is determined by Rtt (nominal) in EMRS
Termination included on all DQs, DM, DQS, /DQS, RDQS and /RDQS pins.
Target Rtt (
Ω
) = (Rval1) / 2, (Rval2) / 2 or (Rval3) / 2
DRAM
input
buffer
VDDQ
VSSQ
sw1
sw1
sw2
Rval1
Rval1
Input
Pin
VDDQ
VSSQ
sw2
Rval2
Rval2
sw3
VDDQ
VSSQ
sw3
Rval3
Rval3
Functional Representation of ODT
Command
EMRS
NOP
Old setting
tMOD (min.)
tMOD (max.)
tAOFD
tIS
Updating
New Setting
CK
/CK
ODT
Rtt
Note: tAOFD must be met before issuing EMRS command. ODT must remain low for the entire duration of tMOD window.
ODT update Delay Timing
相關PDF資料
PDF描述
EDE1116ABSE-5C-E 1G bits DDR2 SDRAM
EDE2104ABSE 2G bits DDR2 SDRAM
EDE2104ABSE-5C-E 2G bits DDR2 SDRAM
EDE2104ABSE-6E-E 2G bits DDR2 SDRAM
EDE2104ABSE-8G-E 2G bits DDR2 SDRAM
相關代理商/技術參數
參數描述
EDE1116ABSE-5C-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1G bits DDR2 SDRAM
EDE1116ABSE-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1G bits DDR2 SDRAM
EDE1116ACBG 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1G bits DDR2 SDRAM
EDE1116ACBG-5C-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1G bits DDR2 SDRAM
EDE1116ACBG-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1G bits DDR2 SDRAM