參數(shù)資料
型號: EFM32TG232F32
廠商: Energy Micro
文件頁數(shù): 132/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 64LQFP
特色產(chǎn)品: EFM32 Tiny Gecko
標準包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標準包裝
其它名稱: 914-1030-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
95
www.energymicro.com
Address
Name
Type
Required
privilege
Reset value
Description
0xE000ED00
CPUID
RO
Privileged
0x412FC23n
n=0 for devices with revision r2p0. n=1 for devices with
revision r2p1.Section 4.3.3 (p. 96)
0xE000ED04
ICSR
RW
1
Privileged
0x00000000
0xE000ED08
VTOR
RW
Privileged
0x00000000
0xE000ED0C
AIRCR
RW
1
Privileged
0xFA050000
0xE000ED10
SCR
RW
Privileged
0x00000000
0xE000ED14
CCR
RW
Privileged
0x00000200
0xE000ED18
SHPR1
RW
Privileged
0x00000000
0xE000ED1C
SHPR2
RW
Privileged
0x00000000
0xE000ED20
SHPR3
RW
Privileged
0x00000000
0xE000ED24
SHCRS
RW
Privileged
0x00000000
0xE000ED28
CFSR
RW
Privileged
0x00000000
0xE000ED28
MMSR
2
RW
Privileged
0x00
0xE000ED29
BFSR
2
RW
Privileged
0x00
0xE000ED2A
UFSR
2
RW
Privileged
0x0000
0xE000ED2C
HFSR
RW
Privileged
0x00000000
0xE000ED34
MMAR
RW
Privileged
Unknown
0xE000ED38
BFAR
RW
Privileged
Unknown
1See the register description for more information.
2A subregister of the CFSR.
4.3.1 The CMSIS mapping of the Cortex-M3 SCB registers
To improve software efficiency, the CMSIS simplifies the SCB register presentation. In the CMSIS, the
byte array SHP[0] to SHP[12] corresponds to the registers SHPR1-SHPR3.
4.3.2 Auxiliary Control Register
The ACTLR provides disable bits for the following processor functions:
IT folding
write buffer use for accesses to the default memory map
interruption of multi-cycle instructions.
See the register summary in Table 4.12 (p. 94) for the ACTLR attributes. The bit assignments are:
DISFOLD
DISDEFWBUF
DISMCYCINT
31
3 2 1 0
Reserved
Table 4.13. ACTLR bit assignments
Bits
Name
Function
[31:3]
-
Reserved
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