參數(shù)資料
型號(hào)： EM78P870
廠商： ELAN Microelctronics Corp .
元件分類： 8位微控制器
英文描述： 8 BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 31/48頁(yè)
文件大?。?/td> 313K
代理商： EM78P870
EM78P870
8-bit OTP Micro-controller
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
28
8/19/2004 (V1.5)
Set when counter1 timer overflows .
Bit 2 (CNT2) : Counter2 timer overflow interrupt flag
Set when counter2 timer overflows .
Bit 3 (INT0) : External INT0 pin interrupt flag
If PORT70 ,PORT71,PORT72 or PORT73 has a falling edge trigger signal. CPU will set this bit.
Bit 4 (INT1) : External INT1 pin interrupt flag
If PORT74 ,PORT75 or PORT76 has a falling edge trigger signal. CPU will set this bit.
Bit 5 (INT2) : External INT2 pin interrupt flag
If PORT77 has a falling edge or rising edge (controlled by CONT register) trigger signal. CPU will set this
bit.
Bit 6 : unused
Bit 7 ( RBF) : Interrupt flag for SPI data complete
If serial IO 's RBF signal has a rising edge signal (RBF set to "1" when transfer data completely), CPU will
set this bit.
IOCF is the interrupt mask register. User can read and clear.
Trigger edge as the table
Signal
Trigger
<Note>
TCC
Time out
COUNTER1
Time out
COUNTER2
Time out
INT0
Falling edge
INT1
Falling edge
INT2
Falling/Falling&rising edge
Controlled by CONT register
RBF
Rising edge
R10~R3F (General Purpose Register)
R10~R3F (Banks 0 ~ 3) : All of them are general purpose registers.
VII.4 Special Purpose Registers
A (Accumulator)
Internal data transfer, or instruction operand holding
It's not an addressable register.
CONT (Control Register)
7
6
5
INT_EDGE
INT
TS
Bit 0 ~ Bit 2 (PSR0 ~ PSR2) : TCC/WDT prescaler bits
PSR2
PSR1
PSR0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
4
-
3
2
1
0
PAB
PSR2
PSR1
PSR0
TCC rate
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
WDT rate
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
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