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參數(shù)資料
| 型號： | EM78P870 |
| 廠商： | ELAN Microelctronics Corp . |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 41/48頁 |
| 文件大?。?/td> | 313K |
| 代理商： | EM78P870 |
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EM78P870
8-bit OTP Micro-controller
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
38
8/19/2004 (V1.5)
VII.5 I/O Port
The I/O registers are bi-directional tri-state I/O ports. The I/O ports can be defined as "input" or "output" pins by
the I/O control registers under program control. The I/O registers and I/O control registers are both readable and
writable. The I/O interface circuit is shown in Fig.19.
Fig.19 The circuit of I/O port and I/O control register
VII.6 RESET
The RESET can be caused by
(1) Power on voltage detector reset (POVD) and power on reset
(2) WDT timeout. (if enabled and in GREEN or NORMAL mode)
(3) /RESET pin pull low
<Note> At case (1), POVD is controlled by CODE OPTION. If you enable POVD, CPU will reset at 2V under.
And CPU will consume more current about 15uA . And the power on reset is a circuit always enable. It
will reset CPU at about 1.4V and consume about 0.5uA.
Once the RESET occurs, the following functions are performed.
The oscillator is running, or will be started.
The Program Counter (R2) is set to all "0".
When power on, the upper 3 bits of R3 and the upper 2 bits of R4 are cleared.
The Watchdog timer and prescaler counter are cleared.
The Watchdog timer is disabled.
The CONT register is set to all "1"
The other register (bit7..bit0)
M
U
X
0
1
PDRD
PDWR
CLK
C
L
P
R
D
Q
Q
CLK
C
L
P
R
D
Q
Q
PCWR
IOD
PCRD
PORT
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