參數資料
型號： ENC424J600-I/PT
廠商： Microchip Technology
文件頁數： 34/168頁
文件大?。?/td> 0K
描述： IC ETHERNET CTRLR W/SPI 44-TQFP
視頻文件： Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝： 160
控制器類型： 以太網控制器（IEEE 802.3）
接口： SPI
電源電壓： 3 V ~ 3.6 V
電流 - 電源： 96mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-TQFP
供應商設備封裝： 44-TQFP（10x10）
包裝： 托盤
產品目錄頁面： 684 (CN2011-ZH PDF)
配用： AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
2007 Microchip Technology Inc.
DS39599G-page 127
PIC18F2220/2320/4220/4320
13.0 TIMER2 MODULE
The Timer2 module timer has the following features:
8-bit Timer register (TMR2)
8-bit Period register (PR2)
Readable and writable (both registers)
Software programmable prescaler (1:1, 1:4, 1:16)
Software programmable postscaler (1:1 to 1:16)
Interrupt on TMR2 match with PR2
MSSP module optional use of TMR2 output to
generate clock shift
Timer2 has a control register shown in Register 13-1.
TMR2 can be shut-off by clearing control bit, TMR2ON
(T2CON<2>),
to
minimize
power
consumption.
Figure 13-1 is a simplified block diagram of the Timer2
module. Register 13-1 shows the Timer2 Control regis-
ter. The prescaler and postscaler selection of Timer2
are controlled by this register.
13.1
Timer2 Operation
Timer2 can be used as the PWM time base for the
PWM mode of the CCP module. The TMR2 register is
readable and writable and is cleared on any device
Reset. The input clock (FOSC/4) has a prescale option
of 1:1, 1:4 or 1:16, selected by control bits,
T2CKPS1:T2CKPS0 (T2CON<1:0>). The match out-
put of TMR2 goes through a 4-bit postscaler (which
gives a 1:1 to 1:16 scaling inclusive) to generate a
TMR2 interrupt (latched in flag bit, TMR2IF (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
A write to the TMR2 register
A write to the T2CON register
Any device Reset (Power-on Reset, MCLR Reset,
Watchdog Timer Reset or Brown-out Reset)
TMR2 is not cleared when T2CON is written.
REGISTER 13-1:
T2CON: TIMER2 CONTROL REGISTER
U-0
R/W-0
—
TOUTPS3
TOUTPS2
TOUTPS1
TOUTPS0
TMR2ON
T2CKPS1
T2CKPS0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6-3
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
bit 2
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
bit 1-0
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
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ENC424J600T-I/PT 功能描述:外圍驅動器與原件 - PCI 10/100 Base-T Stand alone Ethernet Ctrlr RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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