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參數(shù)資料
| 型號(hào)： | ENC624J600-I/PT |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 13/168頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ETHERNET CTRLR W/SPI 64-TQFP |
| 視頻文件： | Fast 100 Mbps Ethernet PICtail Plus Overview |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 控制器類型： | 以太網(wǎng)控制器（IEEE 802.3） |
| 接口： | SPI |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 96mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-TQFP |
| 供應(yīng)商設(shè)備封裝： | 64-TQFP（10x10） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁(yè)面： | 684 (CN2011-ZH PDF) |
| 配用： | AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET |
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2010 Microchip Technology Inc.
DS39935C-page 9
ENC424J600/624J600
2.0
EXTERNAL CONNECTIONS
2.1
Oscillator
ENC424J600/624J600 devices are designed to
operate from a fixed 25 MHz clock input. This clock can
be generated by an external CMOS clock oscillator or
a parallel resonant, fundamental mode 25 MHz crystal
attached to the OSC1 and OSC2 pins. Use of a crystal,
rated for series resonant operation, will oscillate at an
incorrect frequency. To comply with IEEE 802.3 Ethernet
timing requirements, the clock must have no more than
±50 ppm of total error; avoid using resonators or clock
generators that exceed this margin.
When clocking the device using a crystal, follow the
connections shown in Figure 2-1. When using a CMOS
clock oscillator or other external clock source, follow
FIGURE 2-1:
CRYSTAL OSCILLATOR
OPERATION
FIGURE 2-2:
EXTERNAL CLOCK
SOURCE
2.2
CLKOUT Pin
The Clock Out pin (CLKOUT) is provided for use as the
host controller clock or as a clock source for other
devices in the system. Its use is optional.
The 25 MHz clock applied to OSC1 is multiplied by a
PLL to internally generate a 100 MHz base clock. This
100 MHz clock is driven through a configurable
postscaler to yield a wide range of different CLKOUT
frequencies. The PLL multiplication adds clock jitter,
subject to the PLL jitter specification in Section 17.0
“Electrical Characteristics”. However, the postscaler
ensures that the clock will have a nearly ideal duty
cycle.
The CLKOUT function is enabled and the postscaler is
selected via the COCON<3:0> bits (ECON2<11:8>).
To create a clean clock signal, the CLKOUT output and
COCON bits are unaffected by all resets and
power-down modes. The CLKOUT function is enabled
out of POR and defaults to producing a 4 MHz clock.
This allows the device to directly clock the host
processor.
When the COCON bits are written with a new
configuration, the CLKOUT output transitions to the
new frequency without producing any glitches. No high
or low pulses with a shorter period than the original or
new clock are generated.
C1(3)
C2(3)
XTAL
OSC2
RS(1)
OSC1
RF(2)
To Internal Logic
Note 1: A series resistor, RS, may be required for
crystals with a low drive strength specification
or when using large loading capacitors.
2: The feedback resistor, RF , is typically 1.5 M
approx.
3: The load capacitors’ value should be derived
from the capacitive loading specification
provided by the crystal manufacture.
ENCX24J600
3.3V Clock from
External System(1)
OSC1
OSC2
Open
Note 1: Duty cycle restrictions must be observed.
ENCX24J600
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|---|---|
| ENC624J600T-I/PT | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 10/100 Base-T Stand alone Ethernet Ctrlr RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ENC624J600T-IML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface |
| ENC624J600T-IPT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface |
| ENC680D05B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| ENC680D-05B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STD MOV |
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