參數(shù)資料
型號(hào)： EP4S40G5H40I3
廠商： Altera
文件頁數(shù)： 79/82頁
文件大?。?/td> 0K
描述： IC STRATIX IV FPGA 530K 1517HBGA
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 3
系列： STRATIX® IV GT
LAB/CLB數(shù)： 21248
邏輯元件/單元數(shù)： 531200
RAM 位總計(jì)： 28033024
輸入/輸出數(shù)： 654
電源電壓： 0.92 V ~ 0.98 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 1517-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 1517-HBGA（42.5x42.5）
2–2
Chapter 2: Addendum to the Stratix IV Device Handbook
Stratix IV Device Handbook
February 2011
Altera Corporation
Volume 4: Device Datasheet and Addendum
Document Revision History
Table 2–1 lists the revision history for this chapter.
Table 2–1. Document Revision History
Date
Version
Changes
February 2011
1.5
■ Moved the “Adaptive Equalization (AEQ)” sections to the Dynamic Reconfiguration in
■ Minor text edits.
September 2010
1.4
■ Added new information for the Decision Feedback Equalization (DFE) feature.
April 2010
1.3
March 2010
1.2
■ Moved the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correct
Power-Up Sequence for Production Devices”, and “Correct Power-Up Sequence for
Production Devices” sections to the Hot Socketing and Power-On Reset in Stratix IV
Devices chapter.
■ Moved the “Power-On Reset Circuit” and “JTAG TMS and TDI Pin Pull-Up Resistor Value
Specification” sections to the Configuration, Design Security, Remote System Upgrades
with Stratix IV Devices chapter.
■ Moved the “Summary of OCT Assignments” section to the I/O Features in Stratix IV
Devices chapter.
February 2010
1.1
■ Added the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correction to
POR Signal Pulse Width Delay Times”, “Correct Power-Up Sequence for Production
Devices”, “Power-On Reset Circuit”, “Summary of OCT Assignments”, and “JTAG TMS
and TDI Pin Pull-Up Resistor Value Specification” sections.
■ Minor text edits.
November 2009
1.0
■ Stratix IV GX enhanced transceiver data rate specifications in
–4 commercial speed grade.
■ Initial release.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4S40G5H40I3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV 21248 LABs 654 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SE110 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Stratix IV Device
EP4SE230 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Stratix IV Device
EP4SE230F29C2 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV E 9120 LABs 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SE230F29C2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV E 9120 LABs 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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