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參數(shù)資料
| 型號： | EPM7032QC44-15 |
| 廠商： | Altera |
| 文件頁數(shù)： | 8/66頁 |
| 文件大小： | 0K |
| 描述： | IC MAX 7000 CPLD 32 44-PQFP |
| 產(chǎn)品變化通告： | MAX 7000 Series Obsolescence 08/Jun/2009 |
| 標(biāo)準(zhǔn)包裝： | 576 |
| 系列： | MAX® 7000 |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 15.0ns |
| 電壓電源 - 內(nèi)部： | 4.75 V ~ 5.25 V |
| 邏輯元件/邏輯塊數(shù)目： | 2 |
| 宏單元數(shù)： | 32 |
| 門數(shù)： | 600 |
| 輸入/輸出數(shù)： | 36 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-PQFP（10x10） |
| 包裝： | 托盤 |
| 其它名稱： | 544-2292 |
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16
Altera Corporation
MAX 7000 Programmable Logic Device Family Data Sheet
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/O pin can be used as a dedicated
input. When the tri-state buffer control is connected to VCC, the output is
enabled.
The MAX 7000 architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
In-System
Programma-
bility (ISP)
MAX 7000S devices are in-system programmable via an
industry-standard 4-pin Joint Test Action Group (JTAG) interface (IEEE
Std. 1149.1-1990). ISP allows quick, efficient iterations during design
development and debugging cycles. The MAX 7000S architecture
internally generates the high programming voltage required to program
EEPROM cells, allowing in-system programming with only a single 5.0 V
power supply. During in-system programming, the I/O pins are tri-stated
and pulled-up to eliminate board conflicts. The pull-up value is nominally
50 k.
ISP simplifies the manufacturing flow by allowing devices to be mounted
on a printed circuit board with standard in-circuit test equipment before
they are programmed. MAX 7000S devices can be programmed by
downloading the information via in-circuit testers (ICT), embedded
processors, or the Altera MasterBlaster, ByteBlasterMV, ByteBlaster,
BitBlaster download cables. (The ByteBlaster cable is obsolete and is
replaced by the ByteBlasterMV cable, which can program and configure
2.5-V, 3.3-V, and 5.0-V devices.) Programming the devices after they are
placed on the board eliminates lead damage on high-pin-count packages
(e.g., QFP packages) due to device handling and allows devices to be
reprogrammed after a system has already shipped to the field. For
example, product upgrades can be performed in the field via software or
modem.
In-system programming can be accomplished with either an adaptive or
constant algorithm. An adaptive algorithm reads information from the
unit and adapts subsequent programming steps to achieve the fastest
possible programming time for that unit. Because some in-circuit testers
cannot support an adaptive algorithm, Altera offers devices tested with a
constant algorithm. Devices tested to the constant algorithm have an “F”
suffix in the ordering code.
The JamTM Standard Test and Programming Language (STAPL) can be
used to program MAX 7000S devices with in-circuit testers, PCs, or
embedded processor.
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| EPM7032QC44-7 | 制造商:Altera Corporation 功能描述:IC MAX 44QFP 制造商:Altera Corporation 功能描述:IC CPLD 32MC 7.5NS 44QFP |
| EPM7032QI44-12 | 制造商:Altera Corporation 功能描述:IC CPLD 32MC 12NS 44TQFP 制造商:Altera Corporation 功能描述:IC MAX 44TQFP |
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| EPM7032SLC4410 | 制造商:Altera Corporation 功能描述: |
| EPM7032SLC44-10 | 功能描述:IC MAX 7000 CPLD 32 44-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:MAX® 7000 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
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