參數(shù)資料
型號: EPM9560RI240-20
廠商: Altera
文件頁數(shù): 14/46頁
文件大?。?/td> 0K
描述: IC MAX 9000 CPLD 560 240-RQFP
產(chǎn)品變化通告: Package Change 30/Jun/2010
標準包裝: 24
系列: Max® 9000
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 20.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
邏輯元件/邏輯塊數(shù)目: 35
宏單元數(shù): 560
門數(shù): 12000
輸入/輸出數(shù): 191
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 240-BFQFP 裸露焊盤
供應商設備封裝: 240-RQFP(32x32)
包裝: 托盤
其它名稱: 544-2367
Altera Corporation
21
MAX 9000 Programmable Logic Device Family Data Sheet
By combining the pulse and shift times for each of the programming
stages, the program or verify time can be derived as a function of the TCK
frequency, the number of devices, and specific target device(s). Because
different ISP-capable devices have a different number of EEPROM cells,
both the total fixed and total variable times are unique for a single device.
Programming a Single MAX 9000 Device
The time required to program a single MAX 9000 device in-system can be
calculated from the following formula:
where: tPROG
= Programming time
tPPULSE
= Sum of the fixed times to erase, program, and
verify the EEPROM cells
CyclePTCK =Number of TCK cycles to program a device
fTCK
= TCK frequency
The ISP times for a stand-alone verification of a single MAX 9000 device
can be calculated from the following formula:
where: tVER
=Verify time
tVPULSE
= Sum of the fixed times to verify the EEPROM cells
CycleVTCK =Number of TCK cycles to verify a device
t
PR OG
t
PP ULSE
Cyc le
PTC K
f
TCK
--------------------------------
+
=
t
VER
t
VPULSE
Cycle
VTC K
f
TC K
--------------------------------
+
=
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相關代理商/技術參數(shù)
參數(shù)描述
EPM9560RI304-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9560RI304-20 制造商:Altera Corporation 功能描述:IC MAX
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