參數(shù)資料
型號(hào): EPM9560RI240-20
廠商: Altera
文件頁數(shù): 15/46頁
文件大?。?/td> 0K
描述: IC MAX 9000 CPLD 560 240-RQFP
產(chǎn)品變化通告: Package Change 30/Jun/2010
標(biāo)準(zhǔn)包裝: 24
系列: Max® 9000
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 20.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
邏輯元件/邏輯塊數(shù)目: 35
宏單元數(shù): 560
門數(shù): 12000
輸入/輸出數(shù): 191
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 240-RQFP(32x32)
包裝: 托盤
其它名稱: 544-2367
22
Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
The programming times described in Tables 7 through 9 are associated
with the worst-case method using the ISP algorithm.
Tables 8 and 9 show the in-system programming and stand alone
verification times for several common test clock frequencies.
Table 7. MAX 9000 tPULSE & CycleTCK Values
Device
Programming
Stand-Alone Verification
tPPULSE (s)
CyclePTCK
tVPULSE (s)
CycleVTCK
EPM9320
EPM9320A
11.79
2,966,000
0.15
1,806,000
EPM9400
12.00
3,365,000
0.15
2,090,000
EPM9480
12.21
3,764,000
0.15
2,374,000
EPM9560
EPM9560A
12.42
4,164,000
0.15
2,658,000
Table 8. MAX 9000 In-System Programming Times for Different Test Clock Frequencies
Device
fTCK
Units
10 MHz
5 MHz
2 MHz
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
EPM9320
EPM9320A
12.09
12.38
13.27
14.76
17.72
26.62
41.45
71.11
s
EPM9400
12.34
12.67
13.68
15.37
18.73
28.83
45.65
79.30
s
EPM9480
12.59
12.96
14.09
15.98
19.74
31.03
49.85
87.49
s
EPM9560
EPM9560A
12.84
13.26
14.50
16.59
20.75
33.24
54.06
95.70
s
Table 9. MAX 9000 Stand-Alone Verification Times for Different Test Clock Frequencies
Device
fTCK
Units
10 MHz
5 MHz
2 MHz
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
EPM9320
EPM9320A
0.33
0.52
1.06
1.96
3.77
9.18
18.21
36.27
s
EPM9400
0.36
0.57
1.20
2.24
4.33
10.60
21.05
41.95
s
EPM9480
0.39
0.63
1.34
2.53
4.90
12.02
23.89
47.63
s
EPM9560
EPM9560A
0.42
0.69
1.48
2.81
5.47
13.44
26.73
53.31
s
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