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參數(shù)資料
| 型號： | EVAL-AD5424EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 23/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD5424 |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 20.4M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時間： | 30µs |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 125°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5424 |
| 相關(guān)產(chǎn)品： | AD5424YRUZ-REEL7-ND - IC DAC 8BIT MULTIPLYING 16-TSSOP AD5424YRUZ-REEL-ND - IC DAC 8BIT MULTIPLYING 16-TSSOP AD5424YRUZ-ND - IC DAC 8BIT MULTIPLYING 16-TSSOP AD5424YRU-REEL7-ND - IC DAC 8BIT MULTIPLYING 20-TSSOP AD5424YRU-ND - IC DAC 8BIT MULTIPLYING 16-TSSOP AD5424YCPZ-REEL7-ND - IC DAC 8BIT MULTIPLYING 20-LFCSP AD5424YCPZ-ND - IC DAC 8BIT MULTIPLYING 20-LFCSP |
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AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 2 of 28
TABLE OF CONTENTS
REVISION HISTORY
/13—Rev. C to Rev. D
Changes to Figure 4 and Table 4..................................................... 7
Changes to Figure 6 and Table 5..................................................... 8
Changes to Figure 8 and Table 6..................................................... 9
Updated Outline Dimensions....................................................... 25
Changes to Ordering Guide .......................................................... 26
12/12—Rev. B to Rev. C
Changes to General Description Section ...................................... 1
Added Note 2 to Table 1 .................................................................. 4
Added EPAD Note to Table 4 and EPAD Note to Figure 4......... 7
Added EPAD Note to Table 5 and EPAD Note to Figure 6......... 8
Added EPAD Note to Table 6 and EPAD Note to Figure 8......... 9
Deleted the Evaluation Board for AD5424/AD5433/AD5445
Section and Power Supplies for Evaluation Board Section....... 23
Deleted Figure 59; Renumbered Sequentially............................. 24
Deleted Figure 60 and Figure 61................................................... 25
Changes to Ordering Guide .......................................................... 26
Deleted Figure 62 and Table 12; Renumbered Sequentially ..... 26
8/09—Rev. A to Rev. B
Updated Outline Dimensions....................................................... 28
Changes to Ordering Guide.......................................................... 29
3/05—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Specifications.................................................................4
Changes to Figure 49...................................................................... 17
Changes to Figure 50...................................................................... 18
Changes to Figure 51, Figure 52, and Figure 54......................... 19
Added Microprocessor Interfacing Section................................ 22
Added Figure 59 ............................................................................. 24
Added Figure 60 ............................................................................. 25
10/03—Initial Version: Revision 0
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