I
參數(shù)資料
型號(hào): EVAL-AD5424EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 25/29頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD5424
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 1
位數(shù): 8
采樣率(每秒): 20.4M
數(shù)據(jù)接口: 并聯(lián)
設(shè)置時(shí)間: 30µs
DAC 型: 電流
工作溫度: -40°C ~ 125°C
已供物品: 板,CD
已用 IC / 零件: AD5424
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AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 4 of 28
Parameter
Min
Typ
Max
Unit
Test Conditions
Output Capacitance
IOUT1
12
17
pF
All 0s loaded
25
30
pF
All 1s loaded
IOUT2
22
25
pF
All 0s loaded
10
12
pF
All 1s loaded
Digital Feedthrough
1
nV-s
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
Analog THD
81
dB
VREF = 3.5 V p-p, all 1s loaded, f = 100 kHz
Digital THD
Clock = 10 MHz, VREF = 3.5 V
50 kHz fOUT
65
dB
Output Noise Spectral Density2
25
nV√Hz
@ 1 kHz
SFDR Performance (Wide Band)
AD5445, VREF = 3.5 V
Clock = 10 MHz
500 kHz fOUT
55
dB
100 kHz fOUT
63
dB
50 kHz fOUT
65
dB
Clock = 25 MHz
500 kHz fOUT
50
dB
100 kHz fOUT
60
dB
50 kHz fOUT
62
dB
SFDR Performance (Narrow Band)
AD5445, VREF = 3.5 V
Clock = 10 MHz
500 kHz fOUT
73
dB
100 kHz fOUT
80
dB
50 kHz fOUT
82
dB
Clock = 25 MHz
500 kHz fOUT
70
dB
100 kHz fOUT
75
dB
50 kHz fOUT
80
dB
Intermodulation Distortion
AD5445, VREF = 3.5 V
Clock = 10 MHz
f1 = 400 kHz, f2 = 500 kHz
65
dB
f1 = 40 kHz, f2 = 50 kHz
72
dB
Clock = 25 MHz
f1 = 400 kHz, f2 = 500 kHz
51
dB
f1 = 40 kHz, f2 = 50 kHz
65
dB
POWER REQUIREMENTS
Power Supply Range
2.5
5.5
V
IDD
0.6
A
TA = 25°C, logic inputs = 0 V or VDD
0.4
5
A
Logic inputs = 0 V or VDD, T= 40°C to +125°C
Power Supply Sensitivity
0.001
%/%
ΔVDD = ±5%
1
Guaranteed by design, not subject to production test.
2
Specification measured with OP27.
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