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參數(shù)資料
| 型號： | EVAL-AD5443-DBRDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL CARD CLINUX/STAMP |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 2.5M |
| 數(shù)據(jù)接口： | 串行 |
| 設(shè)置時(shí)間： | 50ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 125°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5443 |
| 產(chǎn)品目錄頁面： | 788 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD5443YRMZ-REEL7-ND - IC DAC 12BIT SERIAL IN 10MSOP AD5443YRMZ-REEL-ND - IC DAC 12BIT SERIAL IN 10MSOP AD5443YRMZ-ND - IC DAC 12BIT SERIAL IOUT 10-MSOP AD5443YRM-ND - IC DAC 12BIT SERIAL IOUT 10-MSOP |
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 15 of 24
THEORY OF OPERATION
current output DACs consisting of a standard inverting R-2R
ladder configuration. A simplified diagram for the 8-bit AD5426 is
value of R. The value of R is typically 10 kΩ (minimum 8 kΩ
and maximum 12 kΩ). If IOUT1 and IOUT2 are kept at the same
potential, a constant current flows in each ladder leg, regardless
of digital input code. Therefore, the input resistance presented
at VREF is always constant and nominally of value R. The DAC
output (IOUT) is code-dependent, producing various resistances
and capacitances. External amplifier choice should take into
account the variation in impedance generated by the DAC on
the amplifiers inverting input node.
VREF
IOUT2
DAC DATA LATCHES
AND DRIVERS
IOUT1
RFBA
2R
S1
2R
S2
2R
S3
2R
S8
R
03162-041
Figure 40. Simplified Ladder
Access is provided to the VREF, RFB, IOUT1, and IOUT2 terminals of
the DAC, making the device extremely versatile and allowing it
to be configured in several different operating modes. For example,
it can be configured to provide a unipolar output, 4-quadrant
multiplication in bipolar or single-supply modes of operation.
Note that a matching switch is used in series with the internal
RFB feedback resistor. If users attempt to measure RFB, power
must be applied to VDD to achieve continuity.
CIRCUIT OPERATION
Unipolar Mode
Using a single op amp, these devices can easily be configured to
provide 2-quadrant multiplying operation or a unipolar output
voltage swing, as shown in Figure 41.
When an output amplifier is connected in unipolar mode, the
output voltage is given by
n
REF
OUT
D
V
2
where D is the fractional representation of the digital word
loaded to the DAC, and n is the number of bits.
D
= 0 to 255 (8-bit AD5426)
= 0 to 1023 (10-bit AD5432)
= 0 to 4095 (12-bit AD5443)
Note that the output voltage polarity is opposite to the VREF
polarity for dc reference voltages.
These DACs are designed to operate with either negative or
positive reference voltages. The VDD power pin is used by only the
internal digital logic to drive the DAC switches’ on and off states.
These DACs are also designed to accommodate ac reference
input signals in the range of 10 V to +10 V.
With a fixed 10 V reference, the circuit shown in Figure 41 gives
a unipolar 0 V to 10 V output voltage swing. When VIN is an ac
signal, the circuit performs 2-quadrant multiplication. Table 5
shows the relationship between digital code and expected output
voltage for unipolar operation (AD5426, 8-bit device).
Table 5. Unipolar Code Table
Digital Input
Analog Output (V)
1111 1111
VREF (255/256)
1000 0000
VREF (128/256) = VREF/2
0000 0001
VREF (1/256)
0000 0000
VREF (0/256) = 0
VOUT = 0
TO –VREF
SCLK SDIN GND
VREF
SYNC
IOUT2
IOUT1
RFB
AGND
AD5426/
AD5432/
AD5443
R1
R2
A1
VREF
VDD
C1
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
MICROCONTROLLER
03162-042
A1
Figure 41. Unipolar Operation
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD5443EB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD5443, 0BIT HIGH BANDWIDTH MULTIPLYING DACS W/ - Bulk |
| EVAL-AD5443EBZ | 功能描述:BOARD EVAL FOR AD5433 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5443SDZ | 功能描述:BOARD EVAL FOR AD5443 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5444EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-AD5444EBZ | 制造商:Analog Devices 功能描述:EVAL KIT FOR 12-/14BIT HIGH BANDWIDTH MULTIPLYING DACS W/ SE - Bulk |
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