參數(shù)資料
型號: EVAL-ADAU1966Z
廠商: Analog Devices Inc
文件頁數(shù): 27/52頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADAU1966
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 16
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: I²S,串行,SPI?
DAC 型: 電壓
工作溫度: -40°C ~ 105°C
已供物品:
已用 IC / 零件: ADAU1966
Data Sheet
ADAU1966
Rev. D | Page 33 of 52
DAC CONTROL 2 REGISTER
Address: 0x08, Reset: 0x06, Name: DAC_CTRL2
Table 32. Bit Descriptions for DAC_CTRL2
Bits
Bit Name
Settings
Description
Reset
Access
[6:5]
VREG_CTRL
Voltage Regulator Control. Select the Regulator Output Voltage.
0x0
RW
00
Regulator Out = 2.5 V
01
Regulator Out = 2.75 V
10
Regulator Out = 3.0 V
11
Regulator Out = 3.3 V
4
BCLK_TDMC
DBCLK Rate in TDM Mode. Number of DBCLK cycles per channel slot when
in TDM mode.
0x0
RW
0
32 BCLK cycles/channel slot
1
16 BCLK cycles/channel slot
3
DAC_POL
DAC Output Polarity. This is a global switch of DAC polarity.
0x0
RW
0
Noninverted DAC Output
1
Inverted DAC Output
2
AUTO_MUTE_EN
Automute Enable. Automatically mutes the DACs when 1024 consecutive
zero input samples are received. This is independent per channel.
0x1
RW
0
Auto-Zero Input Mute Disabled
1
Auto-Zero Input Mute Enabled
1
DAC_OSR
DAC Oversampling Rate. OSR Selection.
0x1
RW
0
256 × fS DAC Oversampling
1
128 × fS DAC Oversampling
0
DE_EMP_EN
De-Emphasis Enable.
0x0
RW
0
No De-Emphasis/Flat
1
De-Emphasis Enabled
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