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參數(shù)資料
| 型號： | EVAL-ADCMP609BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADCMP609 8MSOP |
| 標準包裝： | 1 |
| 主要目的： | 比較器，單路 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADCMP609 |
| 主要屬性： | CMOS 和 TTL 兼容輸出 |
| 次要屬性： | 關(guān)機引腳 |
| 已供物品： | 板 |
ADCMP609
Rev. A | Page 10 of 12
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PCB design
practice (as discussed in the Optimizing Performance section),
these comparators should be stable at any input slew rate with
no hysteresis. Broadband noise from the input stage is observed
in place of the violent chatter seen with most other high speed
comparators. With additional capacitive loading or poor bypassing,
oscillation may be encountered. These oscillations are due to the
high gain bandwidth of the comparator in combination with
feedback through parasitics in the package and PCB. In many
applications, chatter is not harmful.
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