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| 型號(hào)： | EVAL-ADCMP609BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADCMP609 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 比較器，單路 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADCMP609 |
| 主要屬性： | CMOS 和 TTL 兼容輸出 |
| 次要屬性： | 關(guān)機(jī)引腳 |
| 已供物品： | 板 |
ADCMP609
Rev. A | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADCMP609
TOP VIEW
(Not to Scale)
VCC 1
Q
8
VP 2
Q
7
VN 3
VEE
6
SDN 4
HYS
5
06
91
8-
0
02
Figure 2. ADCMP609 Pin Configuration
Table 4. ADCMP609 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCC
VCC Supply.
2
VP
Noninverting Analog Input.
3
VN
Inverting Analog Input.
4
SDN
Shutdown. Drive this pin low to shut down the device.
5
HYS
Hysteresis Control. Bias with resistor or current source for hysteresis.
6
VEE
Negative Supply Voltage.
7
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input (VP) is greater than the
analog voltage at the inverting input (VN), provided the comparator is in compare mode.
8
Q
Inverting Output. Q is at logic low if the analog voltage at the noninverting input (VP) is greater than the analog
voltage at the inverting input (VN), provided the comparator is in compare mode.
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