Current Sink at V
參數(shù)資料
型號: EVAL-ADN2850SDZ
廠商: Analog Devices Inc
文件頁數(shù): 23/28頁
文件大小: 0K
描述: BOARD EVAL FOR ADN2850SDZ
標準包裝: 1
主要目的: 數(shù)字電位器
嵌入式:
已用 IC / 零件: ADN2850
主要屬性: 2 溝道,1024 位置
次要屬性: SPI 接口
已供物品:
ADN2850
Data Sheet
Rev. E | Page 4 of 28
Parameter
Symbol
Conditions
Min
Max
Unit
CURRENT MONITOR TERMINALS
Current Sink at V1
I1
0.0001
10
mA
Current Sink at V2
I2
0.0001
10
mA
DYNAMIC CHARACTERISTICS3, 7
Resistor Noise Density
eN_WB
Code= full scale
RWB = 25 k/250 k, TA = 25°C
20/64
nV/√Hz
Analog Crosstalk
CT
VBX = GND, Measured VW1 with VW2 =
1 VRMS, f = 1 kHz, Code 1 = midscale,
Code 2 = midscale,
RWB = 25 k/250 k
95/80
dB
1
Typicals represent average readings at 25°C and VDD = 5 V.
2
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum current in each code is defined by IWB = (VDD 1)/RWB.
3
Guaranteed by design and not subject to production test.
4
Common-mode leakage current is a measure of the dc leakage from any Terminal B, or Terminal W to a common-mode bias level of VDD/2.
5
EEMEM restore mode current is not continuous. Current is consumed while EEMEM locations are read and transferred to the RDAC register.
6
PDISS is calculated from (IDD × VDD) + (ISS × VSS).
7
All dynamic characteristics use VDD = +2.5 V and VSS = 2.5 V.
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