ADV7174/ADV7179
Rev. B | Page 6 of 52
3.3 V SPECIFICATIONS
VAA = 3.0 V–3.6 V1, VREF = 1.235 V, RSET = 150 Ω. All specifications TMIN to TMAX2, unless otherwise noted. Table 3.
Parameter
Min
Typ
Max
Unit
Resolution (Each DAC)
10
Bits
Accuracy (Each DAC)
Integral Nonlinearity
RSET = 300 Ω
± 0.6
LSB
Differential Nonlinearity
Guaranteed Monotonic
± 1
LSB
Input High Voltage, VINH
2
V
Input Low Voltage, VINL
0.8
V
VIN = 0.4 V or 2.4 V
± 1
μA
Input Capacitance, CIN
10
pF
Output High Voltage, VOH
ISOURCE = 400 μA
2.4
V
Output Low Voltage, VOL
ISINK = 3.2 mA
0.4
V
Three-State Leakage Current
10
μA
Three-State Output Capacitance
10
pF
RSET = 150 Ω, RL = 37.5 Ω
33
34.7
37
mA
RSET = 1041 Ω, RL = 262.5 Ω
5
mA
DAC-to-DAC Matching
2.0
%
Output Compliance, VOC
0
1.4
V
Output Impedance, ROUT
30
kΩ
Output Capacitance, COUT
IOUT = 0 mA
30
pF
VAA
3.0
3.3
3.6
V
Normal Power Mode
RSET = 150 Ω, RL = 37.5 Ω
115
120
mA
RSET = 1041 Ω, RL = 262.5 Ω
20
mA
35
mA
Low Power Mode
62
mA
20
mA
35
mA
Sleep Mode
0.1
μA
0.001
μA
Power Supply Rejection Ratio
COMP = 0.1 μF
0.01
0.5
%/%
1 The max/min specifications are guaranteed over this range. The max/min values are typical over 3.0 V to 3.6 V.
2 Temperature range TMIN to TMAX: –40°C to +85°C.
3 Guaranteed by characterization.
4 Full drive into 37.5 Ω load.
5 DACs can output 35 mA typically at 3.3 V (RSET = 150 Ω and RL = 37.5 Ω), optimum performance obtained at 18 mA DAC current (RSET = 300 Ω and RL = 75 Ω).
6 Minimum drive current (used with buffered/scaled output load).
7 Power measurements are taken with clock frequency = 27 MHz. Max TJ = 110°C.
8 IDAC is the total current (min corresponds to 5 mA output per DAC, max corresponds to 37 mA output per DAC) to drive all three DACs. Turning off individual DACs
reduces IDAC correspondingly.
9 ICCT (circuit current) is the continuous current required to drive the device.
10 Total DAC current in sleep mode.
11 Total continuous current during sleep mode.