- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4489 > EX256-PTQ100I (Microsemi SoC)IC FPGA ANTIFUSE 12K 100-TQFP PDF資料下載
參數(shù)資料
| 型號： | EX256-PTQ100I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 1/48頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA ANTIFUSE 12K 100-TQFP |
| 標準包裝： | 90 |
| 系列： | EX |
| 邏輯元件/單元數(shù)： | 512 |
| 輸入/輸出數(shù)： | 81 |
| 門數(shù)： | 12000 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 供應商設(shè)備封裝： | 100-TQFP（14x14） |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
Revision 10
October 2012
I
2012 Microsemi Corporation
eX Family FPGAs
Leading Edge Performance
240 MHz System Performance
350 MHz Internal Performance
3.9 ns Clock-to-Out (Pad-to-Pad)
Specifications
3,000 to 12,000 Available System Gates
Maximum 512 Flip-Flops (Using CC Macros)
0.22 m CMOS Process Technology
Up to 132 User-Programmable I/O Pins
Features
High-Performance, Low-Power Antifuse FPGA
LP/Sleep Mode for Additional Power Savings
Advanced Small-Footprint Packages
Hot-Swap Compliant I/Os
Single-Chip Solution
Nonvolatile
Live on Power-Up
No Power-Up/Down Sequence Required for Supply
Voltages
Configurable Weak-Resistor Pull-Up or Pull-Down for
Tristated Outputs during Power-Up
Individual Output Slew Rate Control
2.5 V, 3.3 V, and 5.0 V Mixed-Voltage Operation with
5.0V Input Tolerance and 5.0V Drive Strength
Software Design Support with Microsemi Designer and
Libero Integrated Design Environment (IDE) Tools
Up to 100% Resource Utilization with 100% Pin Locking
Deterministic Timing
Unique In-System Diagnostic and Verification Capability
with Silicon Explorer II
Boundary Scan Testing in Compliance with IEEE
Standard 1149.1 (JTAG)
Fuselock Secure Programming Technology Designed
to Prevent Reverse Engineering and Design Theft
Product Profile
Device
eX64
eX128
eX256
Capacity
System Gates
Typical Gates
3,000
2,000
6,000
4,000
12,000
8,000
Register Cells
Dedicated Flip-Flops
Maximum Flip-Flops
64
128
256
512
Combinatorial Cells
128
256
512
Maximum User I/Os
84
100
132
Global Clocks
Hardwired
Routed
1
2
1
2
1
2
Speed Grades
–F, Std, –P
Temperature Grades*
C, I, A
Package (by pin count)
TQ
64, 100
100
Note: *Refer to the eX Automotive Family FPGAs datasheet for details on automotive temperature offerings.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A40MX02-3PLG68I | IC FPGA MX SGL CHIP 3K 68-PLCC |
| A40MX02-3PL68I | IC FPGA MX SGL CHIP 3K 68-PLCC |
| M1A3P400-1FGG256I | IC FPGA 1KB FLASH 400K 256-FBGA |
| A3P400-1FGG256I | IC FPGA 1KB FLASH 400K 256-FBGA |
| M1A3P400-1FG256I | IC FPGA 1KB FLASH 400K 256-FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EX256-PTQ100PP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX256-PTQ128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX256-PTQ128I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX256-PTQ128PP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX256-PTQ180 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
發(fā)布緊急采購，3分鐘左右您將得到回復。