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參數(shù)資料
| 型號： | FS451AC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | i-Net TV Interface Video Processor |
| 中文描述： | 一至網(wǎng)絡電視接口視頻處理器 |
| 文件頁數(shù)： | 24/60頁 |
| 文件大小： | 266K |
| 代理商： | FS451AC |
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FS450, FS451
PRELIMINARY PRODUCT DESCRIPTION
JUNE, 2000, VERSION 1.2
24
COPYRIGHT
ó
1999, 2000 FOCUS ENHANCEMENTS, INC.
PRELIMINARY INFORMATION
Notes:
VMI 656 Input Control:
If the Video Module Interface (VMI) mode is specified, SAV and EAV commands are
inserted into the CCIR601 data stream to coordinate down stream data processing. The SAV and EAV Control
words have the following format:
YC Data
D7
D6
D5
Preamble C
1
1
1
Preamble Y
0
0
0
Status Word C
0
0
0
Status Word Y
1
F
V
D4
1
0
0
H
D3
1
0
0
P3
D2
1
0
0
P2
D1
1
0
0
P1
D0
1
0
0
P0
Table 3: SAV and EAV Control Words
F = 0 during field 1, F = 1 during field 2
H = 0 for SAV, H = 1 for EAV
V = 1 during vertical blanking
P3 = V xor H
P2 = F xor H
P1 = F xor V
P0 = F xor V xor H
UIM_MOD Mapping:
The UIM_MOD (Universal Input Mux, UIM) bits select the mode for P0-P11 and E0-E5. The
intention is to support as many different 3D and GCC graphic controllers, CPU support chips and integrated
CPUs as possible (collectively referred to in this data sheet as "GCC"). The following table shows the mapping
in each mode for the digital RGB from the GCC to the appropriate port or extended port pin:
UIM_MOD
0
0
1
1
1
P/E Port
M888DL
M888DH
M888IL
M888IH
M565IL
P11
G3
R7
G4
R7
G2
P10
G2
R6
G3
R6
G1
P9
G1
R5
G2
R5
G0
P8
G0
R4
B7
R4
B4
P7
B7
R3
B6
R3
B3
P6
B6
R2
B5
G7
B2
P5
B5
R1
B4
G6
B1
P4
B4
R0
B3
G5
B0
P3
B3
G7
G0
R2
0
P2
B2
G5
B2
R1
0
P1
B1
G4
B1
R0
0
P0
B0
G3
B0
G1
0
E5
X
X
X
X
X
E4
X
X
X
X
X
E3
X
X
X
X
X
E2
X
X
X
X
X
E1
X
X
X
X
X
E0
X
X
X
X
X
1
2
2
3
3
3
M565IH
R4
R3
R2
R1
R0
G5
G4
G3
0
0
0
0
X
X
X
X
X
X
M555L
G2
G1
G0
B4
B3
B2
B1
B0
X
X
X
X
X
X
X
X
X
X
M555H
X
R4
R3
R2
R1
R0
G4
G3
X
X
X
X
X
X
X
X
X
X
N666
R5
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
G0
B5
B4
B3
B2
B1
B0
N565
R4
R3
R2
R1
R0
0
G5
G4
G3
G2
G1
G0
B4
B3
B2
B1
B0
0
N555
R4
R3
R2
R1
R0
0
G4
G3
G2
G1
G0
0
B4
B3
B2
B1
B0
0
Table 4: GCC Port Mapping (UIM_MOD)
1) All input bits are MSB justified
3) For GCC to P/E Mapping, see Table 2
2) Shaded modes require zero padding at input port
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