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參數(shù)資料
| 型號： | FS6370-01 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | EEPROM Programmable 3-PLL Clock Generator IC |
| 中文描述： | EEPROM的可編程3 - PLL時鐘發(fā)生器芯片 |
| 文件頁數(shù)： | 17/25頁 |
| 文件大小： | 1415K |
| 代理商： | FS6370-01 |
17
FS6370-01
EEPROM Programmable 3-PLL Clock Generator IC
Table 15: AC Timing Specifications
Unless otherwise stated, V
DD
= 5.0V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not currently production tested to any specific limits. MIN and MAX characterization data are
±
3
σ
from typical.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK
(MHz)
MIN.
TYP.
MAX.
UNITS
Overall
EEPROM Write Cycle Time
t
WC
4
ms
V
DD
= 5.5V
0.8
150
Output Frequency *
f
O
V
DD
= 3.6V
0.8
100
MHz
V
DD
= 5.5V
40
230
VCO Frequency *
f
VCO
V
DD
= 3.6V
40
170
MHz
VCO Gain *
A
VCO
400
MHz/V
LFTC bit = 0
7
Loop Filter Time Constant *
LFTC bit = 1
20
μ
s
V
O
= 0.5V to 4.5V; C
L
= 15pF
2.0
Rise Time *
t
r
V
O
= 0.3V to 3.0V; C
L
= 15pF
2.1
ns
V
O
= 4.5V to 0.5V; C
L
= 15pF
1.8
Fall Time *
t
f
V
O
= 3.0V to 0.3V; C
L
= 15pF
1.9
ns
Tristate Enable Delay *
t
PZL,
t
PZH
1
8
ns
Tristate Disable Delay *
t
PLZ,
t
PHZ
1
8
ns
Output active from power-up, RUN Mode via PD pin
100
μ
s
ms
Clock Stabilization Time *
t
STB
After last register is written, Register Program Mode
1
Divider Modulus
Feedback Divider
N
F
See also Table 2
8
2047
Reference Divider
N
R
1
255
Post Divider
N
P
See also Table 8
1
50
Clock Outputs (PLL A clock via CLK_A pin)
Duty Cycle *
Ratio of pulse width (as measured from rising edge to next
falling edge at 2.5V) to one clock period
100
45
55
%
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
=15pF, f
=14.318MHz, N
F
=220, N
R
=63, N
Px
=50,
No other PLLs active
100
45
Jitter, Long Term (
σ
y
(
τ
)) *
t
j(LT)
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
=15pF, f
=14.318MHz, N
=220, N
=63, N
=50,
all other PLLs active (B=60MHz, C=40MHz, D=14.318MHz)
50
165
ps
From rising edge to the next rising edge at 2.5V, C
L
=15pF,
f
=14.318MHz, N
F
=220, N
R
=63, N
Px
=50,
No other PLLs active
100
110
Jitter, Period (peak-peak) *
t
j(
P)
From rising edge to the next rising edge at 2.5V, C
L
=15pF,
f
=14.318MHz, N
=220, N
=63, N
=50, all other PLLs
active (B=60MHz, C=40MHz, D=14.318MHz)
50
390
ps
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FS6370-01G-XTD | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 EE PROG 3-PLL CLOCK RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6370-01G-XTP | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 EE PROG 3-PLL CLOCK RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6377 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable 3-PLL Clock Generator IC |
| FS6377-01 | 制造商:AMI 制造商全稱:AMI 功能描述:Programmable 3-PLL Clock Generator IC |
| FS6377-01G | 制造商:AMI 制造商全稱:AMI 功能描述:Programmable 3-PLL Clock Generator IC |
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