參數(shù)資料
型號(hào)： FS6370-01
廠商： Electronic Theatre Controls, Inc.
英文描述： EEPROM Programmable 3-PLL Clock Generator IC
中文描述： EEPROM的可編程3 - PLL時(shí)鐘發(fā)生器芯片
文件頁數(shù)： 18/25頁
文件大?。?/td> 1415K
代理商： FS6370-01
18
FS6370-01
EEPROM Programmable 3-PLL Clock Generator IC
Table 16: AC Timing Specifications, continued
Unless otherwise stated, V
DD
= 5.0V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not currently production tested to any specific limits. MIN and MAX characterization data are
±
3
σ
from typical.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK
(MHz)
MIN.
TYP.
MAX.
UNITS
Clock Outputs (PLL B clock via CLK_B pin)
Duty Cycle *
Ratio of pulse width (as measured from rising edge to
next falling edge at 2.5V) to one clock period
100
45
55
%
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
=15pF, f
=14.318MHz, N
F
=220, N
R
=63,
N
Px
=50, No other PLLs active
100
45
Jitter, Long Term (
σ
y
(
τ
)) *
t
j(LT)
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
=15pF, f
=14.318MHz, N
=220, N
=63,
N
=50, all other PLLs active (A=50MHz, C=40MHz,
D=14.318MHz)
60
75
ps
From rising edge to the next rising edge at 2.5V,
C
=15pF, f
=14.318MHz, N
F
=220, N
R
=63, N
Px
=50,
No other PLLs active
100
120
Jitter, Period (peak-peak) *
t
j(
P)
From rising edge to the next rising edge at 2.5V,
C
=15pF, f
=14.318MHz, N
=220, N
=63, N
=50, all
other PLLs active (A=50MHz, C=40MHz, D=14.318MHz)
60
400
ps
Clock Outputs (PLL_C clock via CLK_C pin)
Duty Cycle *
Ratio of pulse width (as measured from rising edge to
next falling edge at 2.5V) to one clock period
100
45
55
%
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
=15pF, f
=14.318MHz, N
F
=220, N
R
=63,
N
Px
=50, No other PLLs active
100
45
Jitter, Long Term (
σ
y
(
τ
)) *
t
j(LT)
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
L
=15pF, f
XIN
=14.318MHz, N
F
=220, N
R
=63,
N
=50, all other PLLs active (A=50MHz, B=60MHz,
D=14.318MHz)
40
105
ps
From rising edge to the next rising edge at 2.5V,
C
L
=15pF, f
XIN
=14.318MHz, N
F
=220, N
R
=63, N
Px
=50,
No other PLLs active
100
120
Jitter, Period (peak-peak) *
t
j(
P)
From rising edge to the next rising edge at 2.5V,
C
=15pF, f
=14.318MHz, N
=220, N
=63, N
=50, all
other PLLs active (A=50MHz, B=60MHz, D=14.318MHz)
40
440
ps
Clock Outputs (Crystal Oscillator via CLK_D pin)
Duty Cycle *
Ratio of pulse width (as measured from rising edge to
next falling edge at 2.5V) to one clock period
14.318
45
55
%
On rising edges 500
μ
s apart at 2.5V relative to an ideal
clock, C
L
=15pF, f
XIN
=14.318MHz, No other PLLs active
14.318
20
Jitter, Long Term (
σ
y
(
τ
)) *
t
j(LT)
From rising edge to the next rising edge at 2.5V,
C
=15pF, f
=14.318MHz, all other PLLs active
(A=50MHz, B=60MHz, C=40MHz)
14.318
40
ps
From rising edge to the next rising edge at 2.5V,
C
L
=15pF, f
XIN
=14.318MHz, No other PLLs active
14.318
90
Jitter, Period (peak-peak) *
t
j(
P)
From rising edge to the next rising edge at 2.5V,
C
=15pF, f
=14.318MHz, all other PLLs active
(A=50MHz, B=60MHz, C=40MHz)
14.318
450
ps
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FS6370-01G-XTD 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 EE PROG 3-PLL CLOCK RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
FS6370-01G-XTP 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 EE PROG 3-PLL CLOCK RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
FS6377 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable 3-PLL Clock Generator IC
FS6377-01 制造商:AMI 制造商全稱:AMI 功能描述:Programmable 3-PLL Clock Generator IC
FS6377-01G 制造商:AMI 制造商全稱:AMI 功能描述:Programmable 3-PLL Clock Generator IC
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