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參數資料
| 型號： | FT2232HL-TRAY |
| 廠商： | FTDI, Future Technology Devices International Ltd |
| 文件頁數： | 13/67頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB HS DUAL UART/FIFO 64-LQFP |
| 標準包裝： | 160 |
| 系列： | USBmadeEZ-FIFO，F(xiàn)T-X，X-Chip |
| 特點： | USB 至 UART 和（或）FIFO、SPI、I2C、JTAG |
| 通道數： | 2，DUART |
| FIFO's： | 4096 字節(jié) |
| 規(guī)程： | RS232，RS422，RS485 |
| 電源電壓： | 3 V ~ 3.6 V |
| 帶并行端口： | 是 |
| 帶自動流量控制功能： | 是 |
| 帶調制解調器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP |
| 包裝： | 托盤 |
| 其它名稱： | FT2232HL - TRAY |
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Copyright 2012 Future Technology Devices International Limited
20
Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Version 2.21
Clearance No.: FTDI#77
4 Function Description
The FT2232H USB 2.0 High Speed (480Mb/s) to UART/FIFO is one of FTDIs 5th generation of Ics. It has
the capability of being configured in a variety of industry standard serial or parallel interfaces.
The FT2232H has two independent configurable interfaces. Each interface can be configured as UART,
FIFO, JTAG, SPI, I2C or bit-bang mode with independent baud rate generators. In addition to these, the
FT2232H supports a host bus emulation mode, a CPU-Style FIFO mode and a fast opto-isolated serial
interface mode.
4.1 Key Features
USB High Speed to Dual Interface. The FT2232H is a USB 2.0 High Speed (480Mbits/s) to dual
independent flexible and configurable parallel/serial interfaces.
Functional Integration. The FT2232H integrates a USB protocol engine which controls the physical
Universal Transceiver Macrocell Interface (UTMI) and handles all aspects of the USB 2.0 High Speed
interface. The FT222H includes an integrated +1.8V Low Drop-Out (LDO) regulator and 12MHz to 480MHz
PLL. It also includes 4kbytes Tx and Rx data buffers per interface. The FT2232H effectively integrates the
entire USB protocol on a chip with no firmware required.
MPSSE.Multi-Purpose Synchronous Serial Engines (MPSSE), capable of speeds up to 30 Mbits/s, provides
flexible synchronous interface configurations.
Data Transfer rate. The FT2232H supports a data transfer rate up to 12 Mbaud when configured as an
RS232/RS422/RS485 UART interface or greater than 25 Mbytes/second over a synchronous parallel FIFO
interface. Please note the FT2232H does not support the baud rates of 7 Mbaud 9 Mbaud, 10 Mbaud and
11 Mbaud.
Latency Timer. This is really a feature of the driver and is used to as a timeout to flush short packets of
data back to the PC. The default is 16ms, but it can be altered between 0ms and 255ms. At 0ms latency
you get a packet transfer on every high speed microframe.
4.2 Functional Block Descriptions
Dual Multi-Purpose UART/FIFO Controllers. The FT2232H has two independent UART/FIFO
Controllers. These control the UART data, 245 fifo data, opto isolation (Fast Serial) or control the Bit-
Bang mode if selected by SETUP command. Each Multi-Purpose UART/FIFO Controller also contain an
MPSSE (Multi Protocol Synchronous Serial Engine) which can be used independently of each other. Using
this MPSSE, the Multi-Purpose UART/FIFO Controller can be configured, under software command, to
have 1 MPSSE + 1 UART / 245 FIFO (each UART / 245 can be set to Bit Bang mode to gain extra I/O if
required) or 2 MPSSE.
USB Protocol Engine and FIFO control. The USB Protocol Engine controls and manages the interface
between the UTMI PHY and the FIFOs of the chip. It also handles power management and the USB
protocol specification.
Dual Port FIFO TX Buffer (4Kbytes per interface). Data from the Host PC is stored in these buffers
to be used by the Multi-purpose UART/FIFO controllers. This is controlled by the USB Protocol Engine and
FIFO control block.
Dual Port FIFO RX Buffer (4Kbytes per interface). Data from the Multi-purpose UART/FIFO
controllers is stored in these blocks to be sent back to the the Host PC when requested. This is controlled
by the USB Protocol Engine and FIFO control block.
RESET Generator – The integrated Reset Generator Cell provides a reliable power-on reset to the device
internal circuitry at power up. The RESET# input pin allows an external device to reset the FT2232H.
RESET# should be tied to VCCIO (+3.3v) if not being used.
Independent Baud Rate Generators – The Baud Rate Generators provides a x16 or a x10 clock input
to the UARTs from a 120MHz reference clock and consists of a 14 bit pre-scaler and 4 register bits which
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相關代理商/技術參數 |
參數描述 |
|---|---|
| FT2232HMINIMODULE | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB Hi-Speed FT2232H Evaluation Module 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB to serial/FIFO development module |
| FT2232H-MINI-MODULE | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:IC,EVALUATION MODULE;FT2232H;USB HI-SPEED |
| FT2232HQ | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB Hi-Speed to Dual Channel Serial UART/FIFO/JTAG/SPI/I2C IC - QFN-64 |
| FT2232HQ_MINI_ MODULE | 功能描述:界面開發(fā)工具 USB Hi-Speed FT2232H Evaluation Module RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| FT2232HQ-4000 | 制造商:FTDI 制造商全稱:FTDI 功能描述:DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC |
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