參數(shù)資料
型號(hào)： FT2232HL-TRAY
廠商： FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù)： 14/67頁(yè)
文件大?。?/td> 0K
描述： IC USB HS DUAL UART/FIFO 64-LQFP
標(biāo)準(zhǔn)包裝： 160
系列： USBmadeEZ-FIFO，F(xiàn)T-X，X-Chip
特點(diǎn)： USB 至 UART 和（或）FIFO、SPI、I2C、JTAG
通道數(shù)： 2，DUART
FIFO's： 4096 字節(jié)
規(guī)程： RS232，RS422，RS485
電源電壓： 3 V ~ 3.6 V
帶并行端口： 是
帶自動(dòng)流量控制功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP
包裝： 托盤
其它名稱： FT2232HL - TRAY
Copyright 2012 Future Technology Devices International Limited
21
Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Version 2.21
Clearance No.: FTDI#77
provide fine tuning of the baud rate (used to divide by a number plus a fraction). This determines the
Baud Rate of the UART which is programmable from 183 baud to 12 million baud. The FT2232H does not
support the baud rates of 7 Mbaud 9 Mbaud, 10 Mbaud and 11 Mbaud.
See FTDI application note AN232B-05 on the FTDI website (www.ftdichip.com) for more details.
+1.8V LDO Regulator. The +1.8V LDO regulator generates the +1.8 volts for the core and the USB
transceiver cell. Its input (VREGIN) must be connected to a +3.3V external power source. It is also
recommended to add an external filtering capacitor to the VREGIN. There is no direct connection from the
+1.8V output (VREGOUT) and the internal functions of the FT2232H. The PCB must be routed to connect
VREGOUT to the pins that require the +1.8V including VREGIN.
UTMI PHY. The Universal Transceiver Macrocell Interface (UTMI) physical interface cell. This block
handles the Full speed / High Speed SERDES (serialise – deserialise) function for the USB TX/RX data. It
also provides the clocks for the rest of the chip. A 12 MHz crystal should be connected to the OSCI and
OSCO pins. A 12K Ohm resistor should be connected between REF and GND on the PCB.
The UTMI PHY functions include:
Supports 480 Mbit/s “High Speed” (HS)/ 12 Mbit/s “Full Speed” (FS), FS Only and “Low Speed”
(LS)
SYNC/EOP generation and checking
Data and clock recovery from serial stream on the USB.
Bit-stuffing/unstuffing; bit stuff error detection.
Manages USB Resume, Wake Up and Suspend functions.
Single parallel data clock output with on-chip PLL to generate higher speed serial data clocks.
EEPROM Interface. When used without an external EEPROM the FT2232H defaults to a USB to dual
asynchronous serial port device. Adding an external 93C46 (93C56 or 93C66) EEPROM allows each of the
chips channels to be independently configured as a serial UART (RS232 mode), parallel FIFO (245) mode
or fast serial (opto isolation). The external EEPROM can also be used to customise the USB VID, PID,
Serial Number, Product Description Strings and Power Descriptor value of the FT2232H for OEM
applications. Other parameters controlled by the EEPROM include Remote Wake Up, Soft Pull Down on
Power-Off and I/O pin drive strength.
The EEPROM should be a 16 bit wide configuration such as a Microchip 93LC46B or equivalent capable of
a 1Mbit/s clock rate at VCC = +3.00V to 3.6V. The EEPROM is programmable in-circuit over USB using a
utility program called MPROG available from FTDIs web site (www.ftdichip.com). This allows a blank
part to be soldered onto the PCB and programmed as part of the manufacturing and test process.
If no EEPROM is connected (or the EEPROM is blank), the FT2232H will default to dual serial ports. The
device uses its built-in default VID (0403) , PID (6010) Product Description and Power Descriptor Value.
In this case, the device will not have a serial number as part of the USB descriptor.
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