Figure 6-13
Figure 6-14
Figure 6-15
Figure 6-16
Figure 6-17
Figure 6-18
Figure 6-19
Figure 6-20
Figure 6-21
Figure 6-22
Figure 6-23
Input Capture Timing (1-State Delay)...................................................................143
Input Capture Timing (1-State Delay, Buffer Mode)............................................143
Buffered Input Capture with Both Edges Selected ...............................................144
Setting of Input Capture Flag................................................................................144
Clearing of Input Capture Flag..............................................................................145
Setting of Overflow Flag (OVF)...........................................................................145
Clearing of Overflow Flag....................................................................................145
Square-Wave Output (Example) ...........................................................................146
FRC Write-Clear Contention.................................................................................147
FRC Write-Increment Contention.........................................................................148
Contention between OCR Write and Compare-Match..........................................149
Figure 7-1
Figure 7-2
Figure 7-3
Figure 7-4
Figure 7-5
Figure 7-6
Figure 7-7
Figure 7-8
Figure 7-9
Figure 7-10
Figure 7-11
Figure 7-12
Figure 7-13
Figure 7-14
Figure 7-15
Block Diagram of 8-Bit Timer..............................................................................154
Count Timing for Internal Clock Input .................................................................160
Count Timing for External Clock Input................................................................161
Minimum External Clock Pulse Widths................................................................161
Setting of Compare-Match Flags..........................................................................162
Clearing of Compare-Match Flags........................................................................162
Timing of Timer Output........................................................................................163
Timing of Compare-Match Clear..........................................................................163
Timing of External Reset ......................................................................................164
Setting of Overflow Flag (OVF)...........................................................................164
Clearing of Overflow Flag....................................................................................165
Example of Pulse Output.......................................................................................166
TCNT Write-Clear Contention..............................................................................166
TCNT Write-Increment Contention......................................................................167
Contention between TCOR Write and Compare-Match.......................................168
Figure 8-1
Figure 8-2
Figure 8-3
Block Diagram of PWM Timer.............................................................................171
TCNT Increment Timing.......................................................................................175
PWM Timing.........................................................................................................176
Figure 9-1
Figure 9-2
Figure 9-3
Figure 9-4
Figure 9-5
Figure 9-6
Block Diagram of Serial Communication Interface..............................................180
Data Format in Asynchronous Mode....................................................................194
Phase Relationship Between Clock Output and Transmit Data............................195
Data Format in Synchronous Mode ......................................................................199
Timing of Interrupt Signal.....................................................................................203
Sampling Timing (Asynchronous Mode)..............................................................205
xiii