參數(shù)資料
型號: HI5760BIBZ-T
廠商: Intersil
文件頁數(shù): 8/18頁
文件大小: 0K
描述: CONV D/A 10BIT 125MSPS 28-SOIC
標準包裝: 1
設(shè)置時間: 35ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 165mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 標準包裝
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 125M
其它名稱: HI5760BIBZ-TDKR
16
Pin Descriptions
PIN NO.
PIN NAME
PIN DESCRIPTION
1-10
D9 (MSB) Through
D0 (LSB)
Digital Data Bit 9 (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit).
11-14
NC
No Connect. Recommend ground.
15
SLEEP
Control Pin for Power-Down mode. Sleep Mode is active high; Connect to ground for Normal Mode. Sleep
pin has internal 20
A active pulldown current.
16
REFLO
Connect to analog ground to enable internal 1.2V reference or connect to AVDD to disable internal
reference.
17
REFIO
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is
enabled. Use 0.1
F cap to ground when internal reference is enabled.
18
FSADJ
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full Scale Output
Current = 32 x VFSADJ/RSET.
19
COMP1
For use in reducing bandwidth/noise. Recommended: connect 0.1
F to AV
DD .
20
ACOM
Analog Ground.
21
IOUTB
The complimentary current output of the device. Full scale output current is achieved when all input bits
are set to binary 0.
22
IOUTA
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
23
NC
Internally connected to ACOM via a resistor. Recommend leave disconnected. Adding a capacitor to
ACOM for upward compatibility is valid. Grounding to ACOM is valid. (For upward compatibility to 12-bit
and 14-bit devices, pin 23 needs the ability to have a 0.1
F capacitor to ACOM.)
24
AVDD
Analog Supply (+3V to +5V).
25
NC
No Connect. (For upward compatibility to 12 and 14b devices, pin 25 needs to be grounded to ACOM.)
26
DCOM
Digital Ground.
27
DVDD
Digital Supply (+3V to +5V).
28
CLK
Input for clock. Positive edge of clock latches data.
HI5760
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