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參數(shù)資料
| 型號： | HM5264805FTT-A60 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| 中文描述： | 6400 LVTTL接口SDRAM的133 MHz/100 MHz的 |
| 文件頁數(shù)： | 13/67頁 |
| 文件大?。?/td> | 870K |
| 代理商： | HM5264805FTT-A60 |
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HM5264165F/HM5264805F/HM5264405F-75/A60/B60
13
CKE Truth Table
CKE
Current state
Command
n - 1
n
CS
RAS
CAS
WE
Address
Active
Clock suspend mode entry
H
L
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
Any
Clock suspend
L
L
Clock suspend
Clock suspend mode exit
L
H
Idle
Auto-refresh command (REF)
H
H
L
L
L
H
Idle
Self-refresh entry (SELF)
H
L
L
L
L
H
Idle
Power down entry
H
L
L
H
H
H
H
L
H
×
×
×
Self refresh
Self refresh exit (SELFX)
L
H
L
H
H
H
L
H
H
×
×
×
Power down
Power down exit
L
H
L
H
H
H
L
H
H
×
×
×
Note:
H: V
IH
. L: V
IL
.
×
: V
IH
or V
IL
.
Clock suspend mode entry:
The SDRAM enters clock suspend mode from active mode by setting CKE to
Low. When command is input during CKE is low, the command is valid. The clock suspend mode changes
depending on the current status (1 clock before) as shown below.
ACTIVE clock suspend:
This suspend mode ignores inputs after the next clock by internally maintaining
the bank active status.
READ suspend and READ with Auto-precharge suspend:
The data being output is held (and continues to
be output).
WRITE suspend and WRIT with Auto-precharge suspend:
In this mode, external signals are not
accepted. However, the internal state is held.
Clock suspend:
During clock suspend mode, keep the CKE to Low.
Clock suspend mode exit:
The SDRAM exits from clock suspend mode by setting CKE to High during the
clock suspend state.
IDLE:
In this state, all banks are not selected, and completed precharge operation.
Auto-refresh command [REF]:
When this command is input from the IDLE state, the SDRAM starts auto-
refresh operation. (The auto-refresh is the same as the CBR refresh of conventional DRAMs.) During the
auto-refresh operation, refresh address and bank select address are generated inside the SDRAM. For every
auto-refresh cycle, the internal address counter is updated. Accordingly, 4096 times are required to refresh
the entire memory. Before executing the auto-refresh command, all the banks must be in the IDLE state. In
addition, since the precharge for all banks is automatically performed after auto-refresh, no precharge
command is required after auto-refresh.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM5264405FTT-A60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264165FTT-B60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264805FTT-B60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264405FTT-B60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264805FLTT-B60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5264805FTT-B60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264805LTT-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM |
| HM5264805LTT-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM |
| HM5264805LTT-B60 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM |
| HM5264805TT-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM |
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