參數(shù)資料
型號: HV7131E1
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 模擬信號調(diào)理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, CQCC48
封裝: CERAMIC, LCC-48
文件頁數(shù): 48/61頁
文件大小: 2621K
代理商: HV7131E1
HV7131GP
2004/10/29 V2.4 48
HBLANK
(208 SCPs)
HSYNC (640 SCPs)
Active Data: 320 EA
VBLANK[VSYNC]
(8 LCPs)
HOLD SLOT
(Integration Time – Core Frame Time)
Real Frame
Time
Core Frame
Time
Video Lines is
active every other
LCP, that is,
240 Video Lines
for 480 LCPs
IDLE SLOT ((
512+HBLANK)*4
)
1 IDLE LINE (848SCPs)
Y
Cb
Y
Cr
One active
Video Line is
equal to two
Line Clock
Period(LCP)
= (848 x 2) SCPs
HBLANK
(208 SCPs)
HSYNC
(640 SCPs)
SCF
(10Mhz)
VCF[VCLK]
(10Mhz)
Y[7:0]
1 IDLE LINE (848 SCPs)
3. 1/16 Subsampling Timing
1/16 Subsampling Frame Timing Related Parameters
Master Clock Frequency(MCF)
20Mhz
Divided Clock Frequency(DCF)
MCF/1 = 20Mhz
Sensor Clock Frequency(SCF)
DCF/2 = 10Mhz
Sensor Clock Period(SCP)
1/10Mhz = 100ns
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