參數(shù)資料
型號(hào): HV7131E1
廠商: HYNIX SEMICONDUCTOR INC
元件分類(lèi): 模擬信號(hào)調(diào)理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, CQCC48
封裝: CERAMIC, LCC-48
文件頁(yè)數(shù): 53/61頁(yè)
文件大小: 2621K
代理商: HV7131E1
HV7131GP
2004/10/29 V2.4 53
Y[7:0]
VCLK
C[7:0]
HSYNC
X
X
Y0
X
Y1
X
Y2
X
Y3
X
Y4
X
Y5
X
X
X
Cb0
Cr0
Cb1
Cr1
Cb2
Cr2
Cb3
Cr3
Cb4
Cr4
Cb5
Cr5
4. 24bit RGB 4:4:4 output
Register bit configurations : 8bit output, Y First, Cb First, YCbCr 4:4:4, and color space conversion
disabled
Y[7:0]
VCLK
C[7:0]
HSYNC
X
X
G0
X
G1
X
G2
X
G3
X
G4
X
G5
X
X
X
B0
R0
B1
R1
B2
R2
B3
R3
B4
R4
B5
R5
Bayer Data Format
SCTRA[1:0] is set to Bayer mode
- When Bayer output mode is selected, Window Width x Window Height raw image data are produced
with the following sequence. After VSYNC goes low state, the first HSYNC line of a frame is activated
with B pixel data appearing first when both of Column Start Address and Row Start Address are even.
Y[7:0]
Even Line
VCLK
Y[7:0]
Odd Line
HSYNC
X
B
G
B
G
B
G
X
G
R
G
R
G
R
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