參數(shù)資料
型號: HV7131E1
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 模擬信號調理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, CQCC48
封裝: CERAMIC, LCC-48
文件頁數(shù): 7/61頁
文件大?。?/td> 2621K
代理商: HV7131E1
HV7131GP
2004/10/29 V2.4 7
Pin Diagram
1 6 17 1 8 1 9 2 0 2 1 22 2 3 2 4 2 5
H
5 4 3 2 1
35
34
33
32
31
30
29
28
27
26
6
7
8
9
10
11
12
13
14
15
HV7131GP
HV7131GP
CLCC 40 PIN
Top View
Top View
NC
Y[7]
Y[6]
Y[5]
Y[4]
Y[3]
Y[2]
Y[1]
Y[0]
DGNDC
C
C
C
C
C
4 0 3 9 3 8 3 7 3 6
C
C
C
D
D
DVDDC
DGNDC
AGND
AVDD
ENB
RESETB
STROBE
AGND
AVDD
NC
D
D
S
S
V
V
M
D
D
* To the matter concerning package, Wafer business companies are unrelated contents.
Pin Description
The input mode of HSYNC/VSYNC/Y[7:0]/C[7:0] is used to test internal image processing function in
mass production so that it should be not assumed about slave mode operation. The device does not
support slave mode operation. When 8bit output mode is used, we recommend that C[7:0] be set up as
pull-up or pull-down according to I2C regulation. Although there is no pull-up or pull-down, it is no
influence on function operation and leakage current does not become a problem after stabilization of
chip. In case of application with C[7:0] without pull-up or pull-down, any problems were not generated.
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