參數(shù)資料
型號(hào)： HV7131RP
廠商： Electronic Theatre Controls, Inc.
英文描述： CMOS Image Sensor with Image Signal Processing
中文描述： 的CMOS圖像傳感器和圖像信號(hào)處理
文件頁(yè)數(shù)： 20/61頁(yè)
文件大?。?/td> 2621K
代理商： HV7131RP
HV7131GP
2004/10/29 V2.4 20
7
6
5
4
3
2
1
0
Black
Level
Average
Output
Y[7:0]
Pad
Output
with
HSYNC
high
C[7:0]
Pad
Output
with 8bit
mode
HSYNC in
VBLANK
reserved
Unified
Gain
Black
Level
Data
Enable
Black
Level
Compens-
ation
0
0
0
0
0
0
0
1
Black Level Average
Output
This bit enable R/G/B Active Offset registers[24h-26h] to represent black
level average value, instead of updated active offset values
Y[7:0] Pad Output with
HSYNC high
With this bit set to high, Y[7:0] pads go into tri-state when HSYNC is
inactive.
C[7:0] Pad Output with
8bit mode
With this bit set to high, C[7:0] pads go into zero driving state with 8bit
output mode enabled. Otherwise, these pads go into tri-state.
HSYNC in VBLANK
VBLANK is equivalent to VSYNC, and HSYNC is the inversion of HBLANK,
and this bit control whether HSYNC is active or not when VBLANK unit is
LCF.
VSYNC
(VBLANK)
HSYNC
Unified Gain
G gain is used for R, G, and B analog gain
Black Level Data
Enable
HSYNC is generated for light-shielded pixels in 4 lines.
Black Level
Compensation
Black level average values of light-shielded pixels are compensated when
active image data is produced.
Row Start Address High [RSAH : 08h : 0h]
7
6
5
4
3
2
1
0
reserved
Row Start
Address
High
0
0
0
0
0
0
0
0
Row Start Address Low [RSAL : 09h : 02h]
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