參數(shù)資料
型號： HV7131RP
廠商： Electronic Theatre Controls, Inc.
英文描述： CMOS Image Sensor with Image Signal Processing
中文描述： 的CMOS圖像傳感器和圖像信號處理
文件頁數(shù)： 50/61頁
文件大?。?/td> 2621K
代理商： HV7131RP
HV7131GP
2004/10/29 V2.4 50
Y
Cb
One active
Video Line is
equal to four
Line Clock
Period(LCP)
= 848 x 4 SCPs
HBLANK
(208 SCPs)
HSYNC
(640 SCPs)
SCF
(10Mhz)
VCF[VCLK]
(5Mhz)
Y[7:0]
3 IDLE LINES (3 * 848 SCPs)
Anti-Banding Configuration
For Anti-Banding mode to work correctly, the following registers should be configured to the appropriate
values.
AE Mode
60h
Anti-Banding Enable[7]
AE Anti-Banding Step
6a-6ch
SCF / (2 x power line frequency)
AE Integration Time Limit
6d-6fh
The value should be multiples of AE Anti-Banding Step
When Anti-Banding is enabled, AE initializes Integration Time registers[63-65h] to 4 x Anti-Banding
Step value[6a-6ch], and integration increment/decrement amount is set to Anti-Banding Step value in
order to remove anti-banding noise caused by intrinsic energy waveform of light sources. Banding
noise is inherent in CMOS image sensor that adopts rolling shutter scheme for image acquisition.
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