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參數(shù)資料
| 型號： | HV7131RP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號處理 |
| 文件頁數(shù)： | 41/61頁 |
| 文件大?。?/td> | 2621K |
| 代理商： | HV7131RP |
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HV7131GP
2004/10/29 V2.4 41
0
1
0
0
0
0
0
0
The register represents the current Cr scaling value(1/64 resolution) in Digital Gain block, and is
updated every frame by AWB logic when AWB digital gain update mode is active.
AE Status [AEST : 7bh : RO]
7
6
5
4
3
2
1
0
AE Mode State
AE Lock state
RO
RO
RO
RO
RO
RO
RO
RO
AE
Mode
State
This nibble represents the mode where internal Y plane FSM is currently placed
among time-gain control, time-only control, or gain-only control modes.
AE Lock State
Y channel FSM status, “0000” means that AE Y plane is in lock state
AWB Status [AWBST : 7ch : RO]
7
6
5
4
3
2
1
0
Reserved
AE/AWB
Lock
Cb Lock State
Cr Lock State
RO
RO
RO
RO
RO
RO
RO
RO
AE/AWB Lock
This single status bit indicates that AE and AWB are in lock state for optimum still
image capture.
Cb Lock State
Cb channel FSM status. “00” means that AWB Cb plane is in lock state
Cr Lock State
Cr channel FSM status. “00” means that AWB Cr plane is in lock state
Y Frame Mean [YFMEAN : 7dh : RO]
7
6
5
4
3
2
1
0
Y Frame Mean
RO
RO
RO
RO
RO
RO
RO
RO
The register reports current Y plane frame mean value.
Cb Frame Mean [CBFMEAN : 7eh : RO]
7
6
5
4
3
2
1
0
Cb Frame Mean
RO
RO
RO
RO
RO
RO
RO
RO
The register reports current Cb plane frame mean value.
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