參數(shù)資料
型號(hào): HV7131RP
廠商: Electronic Theatre Controls, Inc.
英文描述: CMOS Image Sensor with Image Signal Processing
中文描述: 的CMOS圖像傳感器和圖像信號(hào)處理
文件頁(yè)數(shù): 40/61頁(yè)
文件大小: 2621K
代理商: HV7131RP
HV7131GP
2004/10/29 V2.4 40
0
0
0
0
0
0
1
0
It specifies Cb/Cr frame mean values’ displacement from Cb/Cr Target (73h-74h) value where AWB
goes into LOCK state.
AWB Unlock Boundary [AWBUB : 76h : 06h]
7
6
5
4
3
2
1
0
AWB Unlock Boundary
0
0
0
0
0
1
1
0
It specifies Cb/Cr frame mean values’ displacement from Cb/Cr Target (73h-74h) where AWB is
released from LOCK state. AWB operation retains LOCK state unless Cb/Cr frame mean values’
displacement value exceeds this boundary. The value should be larger AWB Lock Boundary.
AWB White Pixel Boundary [AWBWPB : 77h : 30h]
7
6
5
4
3
2
1
0
AWB White Pixel Boundary
0
0
1
1
0
0
0
0
When Cb/Cr frame mean values’ displacement from Cb/Cr Target exceeds AWB White Pixel Boundary
value, AWB accept frame color as it is and does not try to correct white balance deviation.
Y Digital Gain [YGAIN : 78h : 40h]
7
6
5
4
3
2
1
0
Y Digital Gain
0
1
0
0
0
0
0
0
The register represents the current Y digital gain value (1/64 resolution) in Digital Gain block, and is
updated every frame by AE logic when AE digital gain update mode is active.
Cb Digital Gain [CBGAIN : 79h : 40]
7
6
5
4
3
2
1
0
Cb Digital Gain
0
1
0
0
0
0
0
0
The register represents the current Cb digital gain value (1/64 resolution) in Digital Gain block, and is
updated every frame by AWB logic when AWB digital gain update mode is active.
Cr Digital Gain [AWBSCLB : 7ah : 40h]
7
6
5
4
3
2
1
0
Cr Digital Gain
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