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參數(shù)資料
| 型號(hào)： | HV7161SPA2 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號(hào)處理 |
| 文件頁數(shù)： | 17/72頁 |
| 文件大小： | 2023K |
| 代理商： | HV7161SPA2 |
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Confidential
HV7161SPA2
CMOS Image Sensor
With Image Signal Processing
mode, but video clock frequency is half of color interpolation mode’s to produce half size output in
horizontal direction. Frame rate at the 1/4 ISP sub-sampling mode is equal to the full mode, but at
the 1/4 Bayer sub-sampling mode, double of the full mode.
2. 1/16 Sub-sampling Timing
In 1/16 subsampling mode, valid video data is produced every four line, i.e. for 960 lines, active
video lines are 216 lines. HSYNC active time is equal to HSYNC active time of color interpolation
mode, but video clock frequency is a quarter of color interpolation mode’s to produce a quarter
size output in horizontal direction. Frame rate at the 1/16 ISP sub-sampling mode is equal to the
full mode, but at the 1/16 Bayer sub-sampling mode, 4 times of the full mode.
Anti-Banding Configuration
For Anti-Banding mode to work correctly, the following registers should be configured to the
appropriate values.
AE Mode1
70h
Anti-Banding Enable[6]
AE Anti-Banding Step
7a-7ch
SCP * (2 x power line frequency)
AE Integration Time Limit
7d-7fh
The value should be multiples of AE Anti-Banding Step
When Anti-Banding is enabled, AE initializes Integration Time registers[73-75h] to 4 x Anti-
Banding Step value[7a-7ch], and integration increment/decrement amount is set to Anti-Banding
Step value in order to remove anti-banding noise caused by intrinsic energy waveform of light
sources. Banding noise is inherent in CMOS image sensor that adopts rolling shutter scheme for
image acquisition.
This document has a general product description and is subject to change without notice.
MagnaChip Semiconductor Ltd. does not assume any responsibility for use of circuits described
and no patent licenses are implied.
- 17 -
2005 MagnaChip Semiconductor Ltd.
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