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參數(shù)資料
| 型號： | HV7161SPA2 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號處理 |
| 文件頁數(shù)： | 24/72頁 |
| 文件大?。?/td> | 2023K |
| 代理商： | HV7161SPA2 |
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Confidential
HV7161SPA2
CMOS Image Sensor
With Image Signal Processing
Device ID [DEVID : 00h : 61h]
7
This document has a general product description and is subject to change without notice.
MagnaChip Semiconductor Ltd. does not assume any responsibility for use of circuits described
and no patent licenses are implied.
- 24 -
2005 MagnaChip Semiconductor Ltd.
6
5
4
3
2
1
0
Product ID
1
Revision Number
0
0
1
0
0
0
1
High Nibble represents product number, Low Nibble represents revision number.
Sensor Control A [SCTRA : 01h : 23h]
7
6
5
Fixed
Frame
Rate
0
0
1
Fixed Frame Rate
Sensor supports the fixed frame rate with anti-banding mode
X-Flip
Image is horizontally flipped
Y-Flip
Image is vertically flipped
CifMode
4CIF, CIF(1/4 sub-sampling), or QCIF(1/16 sub-sampling) mode enable
Sub-Sampling mode
ISP Sub-Sampling. Image quality is better than Bayer Sub-
Sampling, but Core Frame Rate doesn't change.
SSSel
Bayer Sub-Sampling. Image quality is lower than ISP Sub-
Sampling, but Core Frame Rate is double.
11
No Scaling mode
10
1/4 sub-sampling
01
1/16 sub-sampling
00
No Scaling mode (equal to '11')
Sensor Control B [SCTRB : 02h : 00h]
7
6
5
4
AE/AWB
Block
Sleep
Sleep
Sleep
0
0
0
0
AE/AWB Block Sleep AE/AWB block goes into sleep mode with this bit set to high.
Image processing datapath block goes into sleep mode with this bit set to
high.
All internal analog block goes into sleep mode with this bit set to high. With
All Digital Block Sleep active, sensor goes into power down mode.
Sleep Mode
All internal digital and analog block goes into soft sleep with this bit set to
4
3
2
1
0
Reserved
X-Flip
Y-Flip
CifMode
SSSel
Video Mode
0
0
0
1
1
0
1
Video Mode
3
2
1
0
Datapath
Block
Analog
Block
Sleep
Mode
Strobe
Enable
Clock Division
0
0
0
0
Datapath Block Sleep
Analog Block Sleep
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