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參數(shù)資料
| 型號： | HV7161SPA2 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號處理 |
| 文件頁數(shù)： | 48/72頁 |
| 文件大?。?/td> | 2023K |
| 代理商： | HV7161SPA2 |
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Confidential
HV7161SPA2
CMOS Image Sensor
With Image Signal Processing
register maximum value(2
24
-1) x sensor clock period (SCP = 47.62ns, SCF = 21MHz) = 0.7989sec.
1) And the lower 2bit of Integration Tim[75h] is always masking as to “11”, thus Integration time
increase/decrease 4code step.
SCF = Sensor Clock Frequency
AE Target Outdoor[LUTARGET1 : 76h : 5ah]
7
6
5
4
AE Target Outdoor
0
1
0
1
AE Target Indoor[LUTARGET2 : 77h : 5ah]
7
6
5
4
AE Target Indoor
0
1
0
1
AE Lock Boundary [AELOCKFINEBND : 78h : f6h]
7
6
5
4
AE Fine Boundary
1
1
1
1
AE Lock Boundary specifies the displacement of Y Frame Mean value(7dh) from AE Target in
which AE goes into LOCK state. With Anti-Banding is enabled, this displacement condition is
discarded, and instead AE Speed Unlock Boundary is used as Lock boundary.
AE Fine Boundary specifies the displacement of Y Frame Mean value(7dh) from AE Target in
which AE start to tune fine integration time or amp gain in order to goes into lock state smoothly.
AE Unlock Boundary [AEUNLOCKBND : 79h : 2ah]
7
6
5
4
AE Unlock Boundary
0
0
1
0
AE Speed Boundary 0 specifies Y Frame Mean displacement from AE Target where integration
time increment/decrement speed changes from 2x (integration unit step) to 1x (integration unit
step). In anti-banding mode, this boundary is used as lock boundary for exposure control.
AE Anti-Banding Step High [AEINTSTEPH : 7ah : 01h]
7
6
5
4
Reserved
0
0
0
0
This document has a general product description and is subject to change without notice.
MagnaChip Semiconductor Ltd. does not assume any responsibility for use of circuits described
and no patent licenses are implied.
- 48 -
2005 MagnaChip Semiconductor Ltd.
3
2
1
0
1
0
1
0
3
2
1
0
1
0
1
0
3
2
1
0
AE Lock Boundary
1
0
1
0
3
2
1
0
1
0
1
0
3
2
1
0
Integration Step Higher
0
0
0
1
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