- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370781 > HYB18T1G800AFL-37 (INFINEON TECHNOLOGIES AG) 1 Gbit DDR2 SDRAM PDF資料下載
參數(shù)資料
| 型號： | HYB18T1G800AFL-37 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 1 Gbit DDR2 SDRAM |
| 中文描述： | 1千兆位DDR2內(nèi)存 |
| 文件頁數(shù)： | 62/89頁 |
| 文件大?。?/td> | 1752K |
| 代理商： | HYB18T1G800AFL-37 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁當(dāng)前第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁
Page 62 Rev. 1.02 May 2004
INFINEON Technologies
HYB18T1G400/800/160AF
1Gb DDR2 SDRAM
3.2 Clock Enable (CKE) Truth Table for Synchronous Transitions
Current State
2
CKE
Command (N)
3,12
RAS, CAS, WE, CS
Action (N)
3
Notes
Previous
Cycle
1
(N-1)
Current
Cycle
1
(N)
Power-Down
L
L
X
Maintain Power-Down
11, 13, 15
L
H
DESELECT or NOP
Power-Down Exit
4, 8, 11, 13
Self Refresh
L
L
X
Maintain Self Refresh
11, 15
L
H
DESELECT or NOP
Self Refresh Exit
4, 5, 9
Bank(s)
Active
H
L
DESELECT or NOP
Active Power-Down Entry
4,8,10,11, 13
All Banks Idle
H
L
DESELECT or NOP
Precharge Power-Down Entry
4,8,10,11
H
L
AUTOREFRESH
Self Refresh Entry
6, 9, 11, 13
Any State other
than listed above
H
H
Refer to the Command Truth Table
7
1. CKE (N) is the logic state of CKE at clock edge N; CKE (N-1) was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR2 SDRAM immediately prior to clock edge N.
3. Command (N) is the command registered at clock edge N, and Action (N) is a result of Command (N).
4. All states and sequences not shown are illegal or reserved unless explicitly described elsewhere in this document.
5. On Self Refresh Exit DESELECT or NOP commands must be issued on every clock edge occurring during the tXSNR
period.
Read commands may be issued only after tXSRD (200 clocks) is satisfied.
6. Self Refresh mode can only be entered from the All Banks Idle state.
7. Must be a legal command as defined in the Command Truth Table.
8. Valid commands for Power-Down Entry and Exit are NOP and DESELECT only.
9. Valid commands for Self Refresh Exit are NOP and DESELCT only.
10. Power-Down and Self Refresh can not be entered while Read or Write operations, (Extended) mode Register operations,
Precharge or Refresh operations are in progress. See section 2.8 “Power Down” and section 2.7.2 “Self Refresh Com-
mand” for a detailed list of restrictions.
11. Minimum CKE high time is 3 clocks, minimum CKE low time is 3 clocks.
12. The state of ODT does not affect the states described in this table. The ODT function is not available during Self Refresh.
13. The Power-Down Mode does not perform any refresh operations. The duration of Power-Down Mode is therefor limited by
the refresh requirements.
14. CKE must be maintained high while the device is in OCD calibration mode.
15. “X” means “don’t care (including floating around VREF)” in Self Refresh and Power Down. However ODT must be driven
high or low in Power Down if the ODT function is enabled (Bit A2 or A6 set to “1” in EMRS(1)).
16. Operation that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must
be powered down and then restarted through the specified initialization sequence before normal operation can continue.
3.3 Data Mask (DM) Truth Table
Name (Function)
DM
DQs
Notes
Write Enable
L
Valid
1
Write Inhibit
H
X
1
1. Used to mask write data; provided coincident with the corresponding data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB18T1G800AFL-3S | 1 Gbit DDR2 SDRAM |
| HYB18T1G800AFL-5 | 1 Gbit DDR2 SDRAM |
| HYB18T1G800TC-3 | MEMORY SPECTRUM |
| HYB18T1G800TC-37 | MEMORY SPECTRUM |
| HYB18T256160AF | 256 Mbi t DDR2 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18T1G800BF-3S | 功能描述:IC DDR2 SDRAM 1GBIT 68TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| HYB18T256400AF-3.7 | 制造商:Infineon Technologies AG 功能描述:64M X 4 DDR DRAM, 0.5 ns, PBGA60 |
| HYB18T256400AF-5 | 制造商:Infineon Technologies AG 功能描述:SDRAM, DDR, 64M x 4, 60 Pin, Plastic, BGA |
| HYB18T256800AF-5 | 制造商:Infineon Technologies AG 功能描述: |
| HYB18T512161BF-25 | 制造商:Qimonda 功能描述:SDRAM, DDR, 32M x 16, 84 Pin, Plastic, BGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。