參數(shù)資料
型號(hào): HYB18T256160AF-5
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256 Mbi t DDR2 SDRAM
中文描述: 256姆噸DDR2內(nèi)存
文件頁(yè)數(shù): 89/90頁(yè)
文件大?。?/td> 1246K
代理商: HYB18T256160AF-5
HYB18T256400/800/160AF
256Mb DDR2 SDRAM
INFINEON Technologies
Page 89 Rev. 1.02 May 2004
Content
5. AC & DC Operation Conditions
5.1 DC Operation Conditions
5.1.1 Recommended DC Operation Conditions
5.1.2 ODT DC Operation Conditions
5.1.3 Input and Output Leakage Current
5.2 DC & AC Logic Input Levels
5.2.1 Single-ended DC & AC Logic Input Levels)
5.2.2 Single-ended AC Input Test Conditions
5.2.3 Differential DC and AC Input and Output Logic Levels
5.3 Output Buffer Levels
5.3.1 Output DC Current Drive
5.3.2 Output AC Test Conditions
5.3.4 Default Output V-I Characteristics
5.3.5 Full Strength Pull-up Driver Characteristics
5.3.6 Full Strength Pull-down Driver Characteristics
5.3.7 Calibrated Output Driver V-I Characteristics
5.4 Input/Output Capacitances
5.5 Power & Ground Clamp V-I Characteristics
6. IDD Specifications
6.1 IDD Specifications
6.2 IDD Measurement Conditions
6.2 ODT current
7. AC Timing Specifications
7.1 Timing parameters by speed grade - DDR2-400 & DDR2-533
7.2 Timing parameters by speed grade - DDR2-667
7.3
ODT AC Electrical Characteristics and Operating Conditions
7.4 Notes for AC Timing Specifications
8. Reference Loads, Slew Rates and Slew Rate Derating
8.1 Reference Load for Timing Measurements
8.2 Output Slew Rate Measurements
8.3 Input and Data Setup and Hold Time
8.3.1 Timing Definition for Input Setup and Hold Time
8.3.2 Timing Definition for Data Setup and Hold Time
8.3.3 Slew Rate Definition for Input and Data Setup and Hold Time
8.3.4 Input Setup and Hold Time Derating Table
8.3.5 Data Setup and Hold Time Derating Table
8.4 Overshoot and Undershoot Specification
9. Package Dimensions
10. DDR2 component nomenclature
相關(guān)PDF資料
PDF描述
HYB18T256160AL-3S 256 Mbi t DDR2 SDRAM
HYB18T256400AF 256 Mbi t DDR2 SDRAM
HYB18T256400AF-3 256 Mbi t DDR2 SDRAM
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