參數(shù)資料
型號(hào): HYB3164160T-60
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 4M x 16-Bit Dynamic RAM
中文描述: 4M X 16 FAST PAGE DRAM, 60 ns, PDSO54
文件頁數(shù): 9/26頁
文件大?。?/td> 383K
代理商: HYB3164160T-60
Semiconductor Group
13
HYB 3164(5)160T-50/-60
4M x 16-DRAM
AC Characteristics
(note: 6,7,8)
T
A
= 0 to 70 C,
V
CC
= 3.3
±
0.3V
Parameter
Symbol
HYB
3164(5)16T-50
HYB
3164(5)16T-60
Unit
Note
min.
max.
min.
max.
common parameters
Random read or write cycle time
t
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
T
t
REF
t
REF
90
110
ns
RAS precharge time
30
40
ns
RAS pulse width
50
100k
60
100k
ns
CAS pulse width
13
100k
15
100k
ns
Row address setup time
0
0
ns
Row address hold time
8
10
ns
Column address setup time
0
0
ns
Column address hold time
10
10
ns
RAS to CAS delay time
18
37
20
45
RAS to column address delay time
13
25
15
30
ns
RAS hold time
13
15
ns
CAS hold time
50
60
ns
CAS to RAS precharge time
5
5
ns
Transition time (rise and fall)
3
30
3
30
ns
7
Refresh period for HYB3164160T
128
128
ms
Refresh period for HYB3165160T
64
64
ms
Read Cycle
Access time from RAS
t
RAC
t
CAC
t
AA
t
OEA
t
RAL
t
RCS
t
RCH
t
RRH
50
60
ns
8, 9
Access time from CAS
13
15
ns
8, 9
Access time from column address
25
30
ns
8, 10
OE access time
13
15
ns
8
Column address to RAS lead time
25
30
ns
Read command setup time
0
0
ns
Read command hold time
0
0
ns
11
Read command hold time referenced
to RAS
0
0
ns
11
CAS to output in low-Z
t
CLZ
0
0
ns
8
相關(guān)PDF資料
PDF描述
HYB3165160T-60 4M x 16-Bit Dynamic RAM
HYB39L128160AC 128-MBIT SYNCHRONOUS LOW-POWER DRAM
HYB39L128160AC-75 128-MBIT SYNCHRONOUS LOW-POWER DRAM
HYB39L128160AC-8 128-MBIT SYNCHRONOUS LOW-POWER DRAM
HYB39L128160AT BJAWBMSpecialty DRAMs Mobile-RAM
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