參數(shù)資料
型號: HYB39L128160AT-8
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128-MBIT SYNCHRONOUS LOW-POWER DRAM
中文描述: 128 - Mbit同步低功率DRAM
文件頁數(shù): 1/49頁
文件大?。?/td> 938K
代理商: HYB39L128160AT-8
HYB 39L128160AC/T
128-MBit 3.3V Mobile-RAM
INFINEON Technologies
1
2003-02
The HYB 39L128160AC Mobile-RAM is a new generation of low power, four bank Synchronous
DRAM organized as 4 banks
×
2Mbit x16. These synchronous Mobile-RAMs achieve high speed
data transfer rates by employing a chip architecture that prefetches multiple bits and then
synchronizes the output data to a system clock.
All of the control, address, data input and output circuits are synchronized with the positive edge of
an externally supplied clock.
Operating the four memory banks in an interleave fashion allows random access operation to occur
at higher rate. A sequential and gapless data rate is possible depending on burst length, CAS
latency and speed grade of the device.
Auto Refresh (CBR) and Self Refresh operation are supported. The device operates with a single
3.3 V
±
0.3 V power supply.
Compared to conventional SDRAM the self-refresh current is further reduced. The Mobile-RAM
devices are available in FBGA “chip-size” or TSOPII packages.
High Performance:
8Mbit x 16 organisation
VDD = VDDQ = 3.3V
Fully Synchronous to Positive Clock Edge
Four Banks controlled by BA0 & BA1
Programmable CAS Latency: 2, 3
Programmable Wrap Sequence: Sequential
or Interleave
Automatic and Controlled Precharge
Command
Programmable Burst Length: 1, 2, 4, 8 and
full page
Data Mask for byte control
Auto Refresh (CBR)
4096 Refresh Cycles / 64ms
Very low Self Refresh current
Power Down and Clock Suspend Mode
Random Column Address every CLK
(1-N Rule)
54-FBGA , with 9 x 6 ball array with 3
depopulated rows, 9 x 8 mm
Operating Temperature Range
Commerical (0
0
to 70
0
C)
-7.5
-8
Units
f
CK,MAX
133
125
MHz
t
CK3,MIN
7.5
8
ns
t
AC3,MAX
5.4
6
ns
t
CK2,MIN
9.5
9.5
ns
t
AC2,MAX
6
6
ns
128-MBit Synchronous Low-Power DRAM
Datasheet (Rev. 2003-02)
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